MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 259

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

SCCR1 — SCI control reg. 1 5-7
SCCR2 — SCI control reg. 2 5-9
SCDRH, SCDRL — SCI data high/low reg. 5-12
SCI 5-1
SCI2 - see also SCI 5-15
SCK 7-4
SCSR1 — SCI status reg. 1 5-10
SCSR2 — SCI status reg. 2 5-12
security 3-30
sensitivity, of interrupts 2-12
serial communications interface - see SCI
serial peripheral interface - see SPI
slave select (SS) 7-4
slow memory 3-19
SMOD - bit in HPRIO 3-11
software interrupt (SWI) 10-16
SP2CR — SPI2 control reg. 7-11
SP2DR — SPI2 data reg. 7-11
SP2OPT — SPI2 control options reg. 7-11
SP2SR — SPI2 status reg. 7-11
SPCR — Serial peripheral control reg. 7-6
SPDR — SPI data reg. 7-8
SPE - bit in SPCR 7-6
SPI 7-1
MC68HC11PH8
baud rate 5-1
block diagram 5-3
data format 5-2
error detection 5-5
interrupt source resolution 5-14
pins 5-1
receive operation 5-2
reset 10-9
SCBDH, SCBDL — SCI baud rate control reg. 5-6
SCCR1 — SCI control reg. 1 5-7
SCCR2 — SCI control reg. 2 5-9
SCDRH, SCDRL — SCI data high/low reg. 5-12
SCSR1 — SCI status reg. 1 5-10
SCSR2 — SCI status reg. 2 5-12
status flags 5-13
transmit operation 5-2
wakeup 5-4
mask option 3-30
NOSEC bit 3-31
block diagram 7-2
buffering 7-1
clock phase 7-3
clock polarity 7-6
clock rate 7-4
errors 7-5
master mode 7-6
MISO 7-4
MOSI 7-4
OPT2 — System configuration options reg. 2 7-9
pins 7-1
polarity 7-3
reset 10-10
SCK 7-4
signals 7-3
SPCR — Serial peripheral control reg. 7-6
SPDR — SPI data reg. 7-8
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,
,
7-8
5-6
7-7
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3-17
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10-24
INDEX
SPI (continued)
SPI2 - see also SPI 7-10
SPIE - bit in SPCR 7-5
SPIF - bit in SPSR 7-7
SPR1 and SPR0 - bits in SPCR 7-7
SPR2 - bit in OPT2 7-9
SPSR — Serial peripheral status reg. 7-7
ST4XCK clock 6-7
stack pointer (SP) 11-2
stacking operations 11-3
stand-by voltage 2-13
status flags, SCI 5-13
STOP mode 3-5
STRCH - bit in OPT2 3-19
stretch, external access 3-19
STRX - bit in INIT2 3-16
SWI 10-16
synchronisation, A/D 9-4
SYNR — Synthesizer program reg. 2-11
SYNX[1:0] - bits in SYNR 2-11
SYNY[5:0] - bits in SYNR 2-11
system reset 10-10
T
T16EN - bit in PLLCR 8-4
T8 - bit in SCDRH 5-12
T8ACR — 8-bit modulus timer A control reg. 8-38
T8ADR — 8-bit modulus timer A data reg. 8-38
T8AF - bit in T8ACR 8-38
T8AI - bit in T8ACR 8-38
T8B - bit in S2DRL 5-17
T8BCR — 8-bit modulus timer B control reg. 8-39
T8BDR — 8-bit modulus timer B data reg. 8-39
T8BF - bit in T8BCR 8-39
T8BI - bit in T8BCR 8-39
T8CCR — 8-bit modulus timer C control reg. 8-40
T8CDR — 8-bit modulus timer C data reg. 8-40
T8CF - bit in T8CCR 8-40
T8CI8 - bit in T8CCR 8-40
TC - bit in SCSR1 5-10
TC2 - bit in S2SR1 5-16
TCIE - bit in SCCR2 5-9
TCIE2 - bit in S2CR2 5-16
TCNT — Timer counter reg. 8-14
TCTL1 — Timer control reg. 1 8-14
TCTL2 — Timer control reg. 2 8-9
TDRE - bit in SCSR1 5-10
TDRE2 - bit in S2SR1 5-16
TE - bit in SCCR2 5-9
TE2 - bit in S2CR2 5-16
test methods A-3
TFLG1 — Timer interrupt flag reg. 1 8-16
TFLG2 — Timer interrupt flag reg. 2 8-18
SPSR — Serial peripheral status reg. 7-7
SS 7-4
transfer formats 7-2
disabling 11-6
stabilization delay 3-17
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10-18
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,
,
7-6
6-10
7-3
MOTOROLA
TPG
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