CY8C36_10 CYPRESS [Cypress Semiconductor], CY8C36_10 Datasheet - Page 19

• Manufacturer Part Number: CY8C36_10
• Manufacturer: CYPRESS [Cypress Semiconductor]

5.6 Memory Map
The CY8C36 8051 memory map is very similar to the MCS-51
memory map.
5.6.1 Code Space
The CY8C36 8051 code space is 64 KB. Only main flash exists
in this space. See the
page 18.
5.6.2 Internal Data Space
The CY8C36 8051 internal data space is 384 bytes, compressed
within a 256-byte space. This space consists of 256 bytes of
RAM (in addition to the SRAM mentioned in
page 18) and a 128-byte space for Special Function Registers
(SFRs). See
banks of registers R0-R7. The next 16 bytes are bit-addressable.
Document Number: 001-53413 Rev. *I
Figure
PHUB
5-2. The lowest 32 bytes are used for four
“Flash Program Memory”
Data,
Data,
Data,
Address,
and Control
Signals
Address,
and Control
Signals
Address,
and Control
Signals
IO IF
“Static RAM”
PRELIMINARY
EM Control
Signals
section on
Figure 5-1. EMIF Block Diagram
EMIF
UDB
Data Signals
Address Signals
Control Signals
on
Signals
Other
Control
Figure 5-2. 8051 Internal Data Space
In addition to the register or bit address modes used with the
lower 48 bytes, the lower 128 bytes can be accessed with direct
or indirect addressing. With direct addressing mode, the upper
128 bytes map to the SFRs. With indirect addressing mode, the
upper 128 bytes map to RAM. Stack operations use indirect
addressing; the 8051 stack space is 256 bytes. See the
“Addressing Modes”
DSI Dynamic Output
Control
DSI to Port
PSoC
0x1F
0x2F
0x7F
0xFF
0x00
0x20
0x30
0x80
PORTs
PORTs
PORTs
IO
IO
IO
®
Upper Core RAM Shared
(indirect addressing)
External _ MEM_ ADDR[23:0]
External _ MEM_ DATA[15:0]
3: CY8C36 Family Datasheet
with Stack Space
Lower Core RAM Shared with Stack Space
section on page 11.
(direct and indirect addressing)
Control
4 Banks, R0-R7 Each
Bit-Addressable Area
Special Function Registers
(direct addressing)
SFR
Page 19 of 112
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