ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 119
ISP1362EE/01
Manufacturer Part Number
ISP1362EE/01
Description
Single-chip Universal Serial Bus On-The-Go controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.ISP1362EE01.pdf
(150 pages)
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Table 120: DcDMACounter register: bit allocation
9397 750 12337
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
R/W
R/W
15
0
7
0
16.1.8 Reset Device (F6H)
16.2.1 Write or read Endpoint Buffer (R/W: 10H,12H–1FH/01H–0FH)
16.2 Data flow commands
Table 121: DcDMACounter register: bit description
This command resets the DC in the same way as an external hardware reset by using
the input RESET. All registers are initialized to their ‘reset’ values.
Code (Hex): F6 — reset the device
Transaction — none (code only)
Data flow commands are used to manage the data transmission between the USB
endpoints and the system microprocessor. Much of the data flow is initiated using an
interrupt to the microprocessor. The data flow commands are used to access the
endpoints and determine whether the endpoint buffer memory contains valid data.
Remark: The IN buffer of an endpoint contains input data for the host. The OUT
buffer receives output data from the host.
This command is used to access endpoint buffer memory for reading or writing. First,
the buffer pointer is reset to the beginning of the buffer. Following the command, a
maximum of (N
endpoint buffer. For 16-bit access, the maximum number of words is (M + 1), with M
given by (N
automatically incremented by two.
In direct memory access (DMA), the first two bytes or the first word (the packet
length) are skipped: transfers start at the third byte or the second word of the
endpoint buffer. When reading, the DC can detect the last byte or word by using the
EOP condition. When writing to a bulk or interrupt endpoint, the endpoint buffer must
be completely filled before sending data to the host. Exception: when a DMA transfer
is stopped by an external EOT condition, the current buffer content (full or not) is sent
to the host.
Remark: Reading data after a Write Endpoint Buffer command or writing data after a
Read Endpoint Buffer command data will cause unpredictable behavior of the DC.
Bit
15 to 0
R/W
R/W
14
0
6
0
Symbol
DMACR[15:0]
1) divided by 2. After each read or write action, the buffer pointer is
R/W
R/W
13
0
5
0
Rev. 03 — 06 January 2004
2) bytes can be written or read, N representing the size of the
R/W
R/W
12
0
4
0
DMACR[15:8]
Description
DcDMACounter register
DMACR[7:0]
R/W
R/W
11
0
3
0
Single-chip USB OTG controller
R/W
R/W
10
0
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
R/W
R/W
9
0
1
0
ISP1362
119 of 150
R/W
R/W
8
0
0
0
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