ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 20
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ISP1362EE/01
Manufacturer Part Number
ISP1362EE/01
Description
Single-chip Universal Serial Bus On-The-Go controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.ISP1362EE01.pdf
(150 pages)
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9.3 DMA mode
The ISP1362 also provides the DMA mode for external microprocessors to access
the internal buffer memory of the ISP1362. The DMA operation enables data to be
transferred between the system memory of a microprocessor and the internal buffer
memory of the ISP1362.
Remark: The DMA operation must be controlled by the DMA controller of the external
microprocessor system (master).
microprocessor system and the ISP1362.
The ISP1362 provides two DMA channels. The DMA channel 1 (controlled by the
DREQ1 and DACK1 signals) is for the DMA transfer between the system memory of
a microprocessor and the internal buffer memory of the ISP1362 HC. The DMA
channel 2 (controlled by the DREQ2 and DACK2 signals) is for the DMA transfer
between the system memory of a microprocessor and the internal buffer memory of
the ISP1362 DC. The ISP1362 provides an internal End-Of-Transfer (EOT) signal to
terminate the DMA transfer.
Fig 8. PIO interface between a microprocessor and the ISP1362.
Fig 9. DMA interface between a microprocessor and the ISP1362.
Rev. 03 — 06 January 2004
PROCESSOR
PROCESSOR
MICRO-
MICRO-
D [ 15:0 ]
DREQ1
DREQ2
DACK1
DACK2
D [ 15:0 ]
IRQ1
IRQ2
WR
RD
CS
WR
A2
A1
RD
Figure 9
P bus interface
P bus interface
shows the DMA interface between a
Single-chip USB OTG controller
D [ 15:0 ]
RD
WR
CS
A1
A0
INT1
INT2
D [ 15:0 ]
RD
WR
DACK1
DREQ1
DACK2
DREQ2
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1362
ISP1362
004aaa042
004aaa043
ISP1362
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