ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 48
ISP1362EE/01
Manufacturer Part Number
ISP1362EE/01
Description
Single-chip Universal Serial Bus On-The-Go controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.ISP1362EE01.pdf
(150 pages)
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Product data
12.8.3 OC detection circuit using internal charge pump in the OTG mode
external OC detection circuit, set AnalogOCEnable, bit 10 of register
HcHardwareConfiguration, to logic 0. By default after reset this bit is set to logic 0.
Therefore, the HC Driver does not need to clear this bit.
Figure 24
When port 1 is operating in the OTG mode, you may choose to use the internal
charge pump to provide 5 V V
mode, the overcurrent condition is detected by a drop in V
the built-in comparator. The overcurrent condition causes a change in the
A_VBUS_VLD bit of the OtgStatus register. The software has to clear the
DRV_VBUS bit in the OtgControl register when it detects the A_VBUS_VLD bit
turning to logic 0.
Fig 24. Using external OC detection circuit.
(1) 100 F for the host port or 4.7 F for the OTG port.
004aaa149
chassis
chassis
V BUS
GND
shows how to use an external OC detection circuit.
DM
DP
1
2
3
4
5
6
Rev. 03 — 06 January 2004
DGND
DGND
C41 (1)
BUS
DGND
, or supply V
C17
0.1 F
PSU_5V
FB2
BUS
from an external source. In this
Single-chip USB OTG controller
OC DETECTION
V IN
V OUT
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
BUS
OC
EN
that will be sensed by
ISP1362
H_PSWn
H_OCn
48 of 150
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