ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 95

• Manufacturer Part Number: ISP1362EE/01
• Description: Single-chip Universal Serial Bus On-The-Go controller
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Table 68:
9397 750 12337
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Hc PInterrupt register: bit allocation
INTL_IRQ
R/W
15
7
0
-
-
15.4.3 HcTransferCounter register (R/W: 22H/A2H)
15.4.4 Hc PInterrupt register (R/W: 24H/A4H)
ClkReady
Regardless of the programmed I/O (PIO) or DMA data transfer modes, this register is
used to initialize the number of bytes to be transferred to or from the ISTL, INTL or
ATL buffer RAM. For the count value loaded in the register to take effect, the HCD is
required to set bit 7 of the HcDMAConfiguration register to HIGH. When the count
value has reached, the HC needs to generate an internal EOT signal to set bit 2 of
the Hc PInterrupt register, AllEOInterrupt, and update the HcBufferStatus register.
The bit allocation of the HcTransferCounter register is given in
Code (Hex): 22 — read
Code (Hex): A2 — write
Table 67:
All the bits in this register are active at power-on reset. None of the active bits,
however, will cause an interrupt on the interrupt pin (INT1) unless they are set by the
respective bits in the Hc PInterruptEnable register and bit 0 of the
HcHardwareConfiguration register is also set.
After this register (24H–read) is read, the bits that are active will not be reset until
logic 1 is written to the bits in this register (A4H–write) to clear it.
The bits in this register are cleared only when you write to this register indicating the
bits to be cleared. To clear all the enabled bits in this register, the HCD must write
FFH to this register.
The bit allocation of the Hc PInterrupt register is given in
Code (Hex): 24 — read
Code (Hex): A4 — write
Bit
15 to 0
R/W
14
6
0
-
-
Symbol
CounterValue
[15:0]
HcTransferCounter register: bit description
Suspended
R/W
HC
13
5
0
-
-
Rev. 03 — 06 January 2004
reserved
Access
R/W
OPR_Reg
R/W
12
4
0
-
-
Value
0000H
Interrupt
AllEOT
R/W
11
3
0
-
-
Description
Number of data bytes to be read from or
written to the buffer RAM.
ISTL_1_
Single-chip USB OTG controller
R/W
INT
10
2
0
-
-
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table
OTG_IRQ
Table
ISTL_0_
68.
R/W
R/W
INT
9
0
1
0
ISP1362
67.
SOF_INT
ATL_IRQ
R/W
R/W
95 of 150
8
0
0
0