LPC47M172_07 SMSC [SMSC Corporation], LPC47M172_07 Datasheet - Page 188

• Manufacturer Part Number: LPC47M172_07
• Description: Advanced I/O Controller with Motherboard GLUE Logic
• Manufacturer: SMSC [SMSC Corporation]

Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Note 1:
SMSC/Non-SMSC Register Sets (Rev. 01-11-07)
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
Config.
Port
LOGICAL
NUMBER
DEVICE
This chip uses address bits [A11:A0] to decode the base address of each of its logical devices. Bit 6 of the
OSC Global Configuration Register (CR24) must be set to ‘1’ and Address Bits [A15:A12] must be ‘0’ for
16 bit address qualification.
Serial Port 1
Reserved
Reserved
KYBD
Reserved
Reserved
Runtime
Register
Block
Reserved
Config. Port
LOGICAL
DEVICE
0x60,0x61
n/a
n/a
n/a
n/a
n/a
0x60,0x61
n/a
0x26, 0x27
REGISTER
INDEX
DATASHEET
[0x0100:0x0FF8]
ON 8 BYTE BOUNDARIES
n/a
n/a
Not Relocatable
Fixed Base Address: 60,64
n/a
n/a
[0x0000:0x0FC0]
on 64-byte boundaries
n/a
0x0100:0x0FFE
On 2 byte boundaries
Page 188
BASE I/O
(NOTE 1)
RANGE
+0 : RB/TB/LSB div
+1 : IER/MSB div
+2 : IIR/FCR
+3 : LCR
+4 : MSR
+5 : LSR
+6 : MSR
+7 : SCR
n/a
n/a
+0 : Data Register
+4 : Command/Status Reg.
n/a
n/a
+00 : PME Status
.
.
.
+3F : Reserved
(See Table 10.1 for Full List)
n/a
See Configuration Register
Summary table. Accessed through
the index and DATA ports located at
the Configuration Port address and
the Configuration Port address +1
respectively.
BASE OFFSETS
FIXED
SMSC LPC47M172