AT89C51CC03U-S3SIM ATMEL [ATMEL Corporation], AT89C51CC03U-S3SIM Datasheet - Page 108

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AT89C51CC03U-S3SIM

Manufacturer Part Number
AT89C51CC03U-S3SIM
Description
Enhanced 8-bit MCU with CAN Controller and Flash Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
108
AT89C51CC03
Table 49. CANGSTA Register
CANGSTA (S:AAh)
CAN General Status Register
Note:
Reset Value = x0x0 0000b
Number
Bit
7
-
7
6
5
4
3
2
1
0
1. These fields are Read Only.
Bit Mnemonic Description
OVFG
OVFG
RBSY
ENFG
ERRP
TBSY
BOFF
6
-
-
Reserved
The values read from this bit is indeterminate. Do not set this bit.
Overload Frame Flag
This status bit is set by the hardware as long as the produced overload frame
is sent.
This flag does not generate an interrupt
Reserved
The values read from this bit is indeterminate. Do not set this bit.
Transmitter Busy
This status bit is set by the hardware as long as the CAN transmitter
generates a frame (remote, data, overload or error frame) or an ack field. This
bit is also active during an InterFrame Spacing if a frame must be sent.
This flag does not generate an interrupt.
Receiver Busy
This status bit is set by the hardware as long as the CAN receiver acquires or
monitors a frame.
This flag does not generate an interrupt.
Enable On-chip CAN Controller Flag
Because an enable/disable command is not effective immediately, this status
bit gives the true state of a chosen mode.
This flag does not generate an interrupt.
Bus Off Mode
see Figure 53
Error Passive Mode
see Figure 53
5
-
TBSY
(1)
(1)
4
(1)
(1)
(1)
RBSY
3
(1)
ENFG
2
4182I–CAN–06/05
BOFF
1
ERRP
0

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