AT89C51CC03U-S3SIM ATMEL [ATMEL Corporation], AT89C51CC03U-S3SIM Datasheet - Page 109

• Manufacturer Part Number: AT89C51CC03U-S3SIM
• Description: Enhanced 8-bit MCU with CAN Controller and Flash Memory
• Manufacturer: ATMEL [ATMEL Corporation]

4182I–CAN–06/05
Table 50. CANGIT Register
CANGIT (S:9Bh)
CAN General Interrupt
Note:
Reset Value = 0x00 0000b
Number
CANIT
Bit
7
7
6
5
4
3
2
1
0
1. These fields are Read Only.
Bit Mnemonic Description
OVRBUF
OVRTIM
CANIT
SERG
CERG
FERG
AERG
6
-
-
OVRTIM
General Interrupt Flag
This status bit is the image of all the CAN controller interrupts sent to the
interrupt controller.
It can be used in the case of the polling method.
Reserved
The values read from this bit is indeterminate. Do not set this bit.
Overrun CAN Timer
This status bit is set when the CAN timer switches 0xFFFF to 0x0000.
If the bit ETIM in the IE1 register is set, an interrupt is generated.
Clear this bit in order to reset the interrupt.
Overrun BUFFER
0 - no interrupt.
1 - IT turned on
This bit is set when the buffer is full.
Bit resetable by user.
see Figure 50.
Stuff Error General
Detection of more than five consecutive bits with the same polarity.
This flag can generate an interrupt. resetable by user.
CRC Error General
The receiver performs a CRC check on each destuffed received message
from the start of frame up to the data field.
If this checking does not match with the destuffed CRC field, a CRC error is
set.
This flag can generate an interrupt. resetable by user.
Form Error General
The form error results from one or more violations of the fixed form in the
following bit fields:
CRC delimiter
acknowledgment delimiter
end_of_frame
This flag can generate an interrupt. resetable by user.
Acknowledgment Error General
No detection of the dominant bit in the acknowledge slot.
This flag can generate an interrupt. resetable by user.
5
OVRBUF
4
(1)
SERG
3
CERG
2
FERG
1
AERG
0
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