AT89C51CC03U-S3SIM ATMEL [ATMEL Corporation], AT89C51CC03U-S3SIM Datasheet - Page 135

• Manufacturer Part Number: AT89C51CC03U-S3SIM
• Description: Enhanced 8-bit MCU with CAN Controller and Flash Memory
• Manufacturer: ATMEL [ATMEL Corporation]

Figure 63. Queuing Transmission In Master Mode
4182I–CAN–06/05
MOSI
MISO
Data
SPTE
SCK
MSB
MSB
Byte 1
B6
B6
BYTE 1 under transmission
B5
B5
B4
B4
When a transmission is in progress a new data can be queued and sent as soon as
transmission has been completed. So it is possible to transmit bytes without latency,
useful in some applications.
The SPTE bit in SPSCR is set as long as the transmission buffer is free. It means that
the user application can write SPDAT with the data to be transmitted until the SPTE
becomes cleared.
Figure 63 shows a queuing transmission in master mode. Once the Byte 1 is ready, it is
immediately sent on the bus. Meanwhile an other byte is prepared (and the SPTE is
cleared), it will be sent at the end of the current transmission. The next data must be
ready before the end of the current transmission.
In slave mode it is almost the same except it is the external master that start the
transmission.
Also, in slave mode, if no new data is ready, the last value received will be the next data
byte transmitted.
B3
B3
B2
B2
B1
B1
Byte 2
LSB
LSB MSB
MSB
B6
B6
BYTE 2 under transmission
B5
B5
B4
B4
B3
B3
Byte 3
B2
B2
B1
B1
LSB
LSB
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