AT89C51CC03U-S3SIM ATMEL [ATMEL Corporation], AT89C51CC03U-S3SIM Datasheet - Page 126

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AT89C51CC03U-S3SIM

Manufacturer Part Number
AT89C51CC03U-S3SIM
Description
Enhanced 8-bit MCU with CAN Controller and Flash Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
126
AT89C51CC03
Table 81. CANIDM4 Register for V2.0 part B
CANIDM4 for V2.0 part B (S:C7h)
CAN Identifier Mask Registers 4
Note:
No default value after reset.
Table 82. CANMSG Register
CANMSG (S:A3h)
CAN Message Data Register
No default value after reset.
IDMSK 4
Number
Number
MSG 7
Bit
Bit
7-3
7-0
7
7
2
1
0
The ID Mask is only used for reception.
Bit Mnemonic Description
Bit Mnemonic Description
IDMSK 3
IDMSK4:0
MSG 6
RTRMSK
IDEMSK
MSG7:0
6
6
-
IDMSK 2
MSG 5
IDentifier Mask Value
0 - comparison true forced.
1 - bit comparison enabled.
See Figure 54.
Remote Transmission Request Mask Value
0 - comparison true forced.
1 - bit comparison enabled.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
IDentifier Extension Mask Value
0 - comparison true forced.
1 - bit comparison enabled.
Message Data
This register contains the mailbox data byte pointed at the page message
object register.
After writing in the page message object register, this byte is equal to the
specified message location (in the mailbox) of the pre-defined identifier +
index. If auto-incrementation is used, at the end of the data register writing or
reading cycle, the mailbox pointer is auto-incremented. The range of the
counting is 8 with no end loop (0, 1,..., 7, 0,...)
5
5
IDMSK 1
MSG 4
4
4
IDMSK 0
MSG 3
3
3
RTRMSK
MSG 2
2
2
4182I–CAN–06/05
MSG 1
1
1
-
IDEMSK
MSG 0
0
0

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