HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 312

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HD6417034B

Manufacturer Part Number
HD6417034B
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 10 16-Bit Integrated Timer Pulse Unit (ITU)
Figure 10.50 shows an example of input capture operation in buffer mode between GRA and BRA
with GRA as an input capture register. TCNT is cleared by input capture B. The falling edge is
selected as the input capture edge at TIOCB. Both edges are selected as input capture edges at
TIOCA. When the TCNT value is stored in GRA by input capture A, the previous GRA value is
transferred to BRA. The timing is shown in figure 10.51.
Rev. 7.00 Jan 31, 2006 page 286 of 658
REJ09B0272-0700
H' 0250
H' 0200
H' 0100
H' 0000
transfer signal
TIOCB
TIOCA
TCNT value
Figure 10.48 Buffer Mode Operation Example 1 (Output Compare Register)
match signal
GRB
GRA
BRA
Compare
Figure 10.49 Compare Match Timing Example for Buffer Operation
Buffer
TCNT
GR
CK
BR
H' 0250
H' 0200
n
n
H' 0200
H' 0100
Counter cleared by compare match B
Compare match A
H' 0100
N
n + 1
N
H' 0200
H' 0200
Time
Toggle
output
Toggle
output

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