HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 328
HD6417034B
Manufacturer Part Number
HD6417034B
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417034B.pdf
(687 pages)
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Section 10 16-Bit Integrated Timer Pulse Unit (ITU)
10.6.10 Contention between BR Write and Input Capture
When a buffer register (BR) is being used as an input capture register and an input capture signal
is generated in the T3 state of the write cycle, the buffer operation takes priority over the BR write.
The timing is shown in figure 10.66.
Rev. 7.00 Jan 31, 2006 page 302 of 658
REJ09B0272-0700
Figure 10.66 Contention between BR Write and Input Capture
Input capture
write signal
Address
Internal
signal
GR
CK
BR
T1
BR write cycle
M
N
BR address
T2
T3
TCNT value
X
N
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