HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 386

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HD6417034B

Manufacturer Part Number
HD6417034B
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 13 Serial Communication Interface (SCI)
Bits 1 and 0—Clock Select 1 and 0 (CKS1 and CKS0): CKS1 and CKS0 select the internal
clock source of the on-chip baud rate generator. Four clock sources are available: , /4, /16, and
section 13.2.8, Bit Rate Register (BRR).
Bit 1: CKS1
0
1
13.2.6
The serial control register (SCR) enables the SCI transmitter/receiver, selects serial clock output in
asynchronous mode, enables and disables interrupts, and selects the transmit/receive clock source.
The CPU can always read and write to SCR. SCR is initialized to H'00 by a reset and in standby
mode.
Bit 7—Transmit Interrupt Enable (TIE): TIE enables or disables the transmit-data-empty
interrupt (TXI) requested when the transmit data register empty bit (TDRE) in the serial status
register (SSR) is set to 1 due to transfer of serial transmit data from TDR to TSR.
Bit 7: TIE
0
1
Rev. 7.00 Jan 31, 2006 page 360 of 658
REJ09B0272-0700
Bit
Initial value
Read/Write
/64. For further information on the clock source, bit rate register settings, and baud rate, see
Serial Control Register
Bit 0: CKS0
0
1
0
1
Description
Transmit-data-empty interrupt request (TXI) is disabled
The TXI interrupt request can be cleared by reading TDRE after it has been set
to 1, then clearing TDRE to 0, or by clearing TIE to 0.
Transmit-data-empty interrupt request (TXI) is enabled
R/W
TIE
7
0
R/W
RIE
6
0
Description
System clock ( )
/4
/16
/64
R/W
TE
5
0
R/W
RE
4
0
MPIE
R/W
3
0
TEIE
R/W
2
0
CKE1
R/W
1
0
(Initial value)
(Initial value)
CKE0
R/W
0
0

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