HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 411

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HD6417034B

Manufacturer Part Number
HD6417034B
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Receiving Serial Data (Asynchronous Mode): Figure 13.7 shows a sample flowchart for
receiving serial data. The procedure for receiving serial data is listed below.
1. SCI initialization: select the RxD pin function with the PFC.
2. Receive error handling and break detection: if a receive error occurs, read the ORER, PER and
3. SCI status check and receive data read: read the serial status register (SR), check that RDRF is
4. To continue receiving serial data: read RDRF and RDR, and clear RDRF to 0 before the stop
Figure 13.6 Example of SCI Transmit Operation in Asynchronous Mode (8-Bit Data with
TDRE
TEND
FER bits in SSR to identify the error. After executing the necessary error handling, clear
ORER, PER, and FER all to 0. Receiving cannot resume if ORER, PER, or FER remains set to
1. When a framing error occurs, the RxD pin can be read to detect the break state.
set to 1, then read receive data from the receive data register (RDR) and clear RDRF to 0. The
RXI interrupt can also be used to determine if the RDRF bit has changed from 0 to 1.
bit of the current frame is received. If the DMAC is started by a receive-data-full interrupt
(RXI) to read RDR, the RDRF bit is cleared automatically, so this step is unnecessary.
Serial
data
request
1
TXI
Start
bit
0
handler writes
data in TDR
TXI interrupt
TDRE to 0
and clears
D
0
D
1 frame
1
Data
D
Parity and One Stop Bit)
7
Parity
bit
0/1
request
TXI
Stop
bit
1
Section 13 Serial Communication Interface (SCI)
Start
bit
0
D
Rev. 7.00 Jan 31, 2006 page 385 of 658
0
D
1
Data
D
7
Parity
bit
0/1
TEI request
Stop
REJ09B0272-0700
bit
1
Idle (mark)
state
1

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