HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 357

• Manufacturer Part Number: HD6417034B
• Description: 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

11.3.4
Setting Procedures for TPC Output Non-Overlap Operation (Figure 11.6):
1. Select GRA and GRB as output compare registers (output disable) with the timer I/O control
2. Set the TPC output trigger cycle in GRB and the non-overlap cycle in GRA.
3. Select the counter clock with the TPSC2–TPSC0 bits in the timer control register (TCR).
4. Set the timer interrupt enable register (TIER) to enable IMIA interrupts. Transfers to NDR can
5. Set the initial output value in the I/O port data register to be used by the TPC.
6. Set the I/O port control register to be used by the TPC as the TP pin function (11).
7. Set to 1 the bit that performs TPC output to the next data enable register (NDER).
8. Select the ITU compare match that will be the TPC output trigger using the TPC output control
9. Select the group that performs non-overlap operation in the TPC output mode register
10. Set the next TPC output value in NDR.
11. Set 1 in the STR bit of the timer start register (TSTR) and start the timer counter.
12. Set the next output value in NDR whenever an IMIA interrupt is generated.
register (TIOR).
Select the counter clear sources with the CCLR1 and CCLR0 bits.
also be set using the DMAC.
register (TPCR).
(TPMR).
TPC Output Non-Overlap Operation
Section 11 Programmable Timing Pattern Controller (TPC)
Rev. 7.00 Jan 31, 2006 page 331 of 658
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