NAND02G-B2D NUMONYX [Numonyx B.V], NAND02G-B2D Datasheet - Page 24

• Manufacturer Part Number: NAND02G-B2D
• Description: 2-Gbit, 2112-byte/1056-word page multiplane architecture, 1.8 V or 3 V, NAND flash memories
• Manufacturer: NUMONYX [Numonyx B.V]

Device operations
Figure 8.
Figure 9.
24/69
I/O0-7
RB
R
I/O0-7
RB
R
Read
Setup
Code
00h
Read
Setup
Code
After the Sequential Cache Read or Random Cache Read command has been issued, the
Ready/Busy signal goes Low and the Status register bits are set to SR5 =' 0' and SR6 ='0'.
This is for a period of Cache Read busy time, t
into the Cache register.
After the Cache Read busy time has passed, the Ready/Busy signal goes High and the
Status register bits are set to SR5 = '0' and SR6 = '1', signifying that the Cache register is
ready to download new data. Data of the previously read page can be output from the page
buffer by toggling the Read Enable signal. Data output always begins at column address
00h, but the Random Data Output command is also supported.
Cache read (sequential) operation
Cache read (random) operation
00h
Address
Inputs
Address
Inputs
(Read Busy time)
tBLBH1
(Read Busy time)
tBLBH1
Read
Code
30h
Read
Code
30h
Busy
Busy
(Read Cache Busy time)
Cache
Read
Sequential
Code
Repeat as many times as ncessary.
Read
Setup
Code
00h
31h
tRCBSY
Repeat as many times as ncessary.
Address
(Read Cache Busy time)
Inputs
tRCBSY
Enhanced
Cache
Read
(random)
Code
Outputs
31h
(Read Cache Busy time)
Data
RCBSY
tRCBSY
while the device copies the next page
Outputs
Data
Exit
Cache
Read
Code
(Read Cache Busy time)
3Fh
tRCBSY
Exit
Cache
Read
Code
3Fh
Outputs
Data
NAND02G-B2D
Outputs
Data
ai13176c
ai13176b