NAND02G-B2D NUMONYX [Numonyx B.V], NAND02G-B2D Datasheet - Page 46

• Manufacturer Part Number: NAND02G-B2D
• Description: 2-Gbit, 2112-byte/1056-word page multiplane architecture, 1.8 V or 3 V, NAND flash memories
• Manufacturer: NUMONYX [Numonyx B.V]

Software algorithms
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Garbage collection
When a data page needs to be modified, it is faster to write to the first available page,
resulting in the previous page being marked as invalid. After several updates it is necessary
to remove invalid pages to free memory space.
To free this memory space and allow further program operations, the implementation of a
garbage collection algorithm is recommended. In garbage collection software, the valid
pages are copied into a free area and the block containing the invalid pages is erased as
show in
Figure 21. Garbage collection
Wear-leveling algorithm
For write-intensive applications, the implementation of a wear-leveling algorithm is
recommended to monitor and spread the number of write cycles per block.
In memories that do not use a wear-leveling algorithm, not all blocks get used at the same
rate. The wear-leveling algorithm insures that equal use is made of all the available write
cycles for each block. There are two wear-leveling levels:
The second level wear-leveling is triggered when the difference between the maximum and
the minimum number of write cycles per block reaches a specific threshold.
First level wear-leveling, where new data is programmed to the free blocks that have
had the fewest write cycles
Second level wear-leveling, where long-lived data is copied to another block so that the
original block can be used for more frequently-changed data.
Figure
Invalid
Valid
page
page
21.
Old area
(Erased)
Free
page
New area (After GC)
AI07599B
NAND02G-B2D