E28F016XS20 INTEL [Intel Corporation], E28F016XS20 Datasheet - Page 16

• Manufacturer Part Number: E28F016XS20
• Description: 16-MBIT (1 MBIT x 16, 2 MBIT x 8) SYNCHRONOUS FLASH MEMORY
• Manufacturer: INTEL [Intel Corporation]

28F016XS FLASH MEMORY
4.0
4.1
NOTES:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Addresses are latched on the rising edge of CLK in conjunction with ADV# low. Address A
16
Latch Read
Address
Inhibit
Latching
Read Address
Read
Output
Disable
Standby
Deep
Power-Down
Manufacturer
ID
Device ID
Write
pins depending on whether or not OE# is active.
RY/BY# output is open drain. When the WSM is ready, Erase is suspended, or the device is in deep power-down mode,
RY/BY# will be at V
is in progress.
RP# at GND ± 0.2V ensures the lowest deep power-down current.
A
codes in x8 and x16 modes respectively. All other addresses are set to zero.
Commands for erase, data program, or lock-block operations can only be completed successfully when V
V
While the WSM is running, RY/BY# stays at V
not busy or in erase suspend mode.
RY/BY# may be at V
write operation).
The 28F016XS shares an identical device identifier with the 28F016XD.
CE
A
X can be V
0
PP
1
Mode
and A
0–1
= 1 selects the odd bank, in both byte-wide mode and word-wide mode device configurations.
= V
BUS OPERATIONS, COMMANDS AND STATUS REGISTER DEFINITIONS
# at V
Bus Operations for Word-Wide Mode (BYTE# = V
PPH2
1
at V
IH
IL
.
is defined as both CE
or V
IL
1,2,7,9
1,6,7,9
1,6,7,9
1,4,8,9
1,5,6,9
provide device manufacturer codes in x8 and x16 modes respectively. A
1,9,10
Notes
1,4,9
IL
1,9
1,3
OH
for address or control pins except for RY/BY#, which is either V
OL
if it is tied to V
while the WSM is busy performing various operations (for example, a Status Register read during a
RP#
V
V
V
V
V
V
V
V
V
IH
IH
IH
IH
IH
IH
IH
IH
IL
0
# and CE
CC
CE
V
V
V
V
V
V
V
V
through a resistor. RY/BY# at V
X
0–1
IL
IL
IL
IL
IL
IL
IL
IL
#
1
OL
# low, and CE
until all operations are complete. RY/BY# goes to V
OE#
V
V
V
V
V
X
X
X
X
IH
IH
IL
IL
IL
WE#
V
V
V
V
V
V
0–1
V
X
X
IH
IH
IH
IH
IH
IH
IL
# at V
ADV#
IH
V
V
OH
is defined as either CE
X
X
X
X
X
X
X
IH
IL
is independent of OE# while a WSM operation
CLK
IH
X
X
X
X
OL
)
or V
0
and A
1
OH
V
V
A
= 0 selects the even bank and
X
X
X
X
X
X
X
, or High Z or D
IL
IH
1
0
# or CE
1
at V
DQ
66A8H
OH
High Z
High Z
High Z
0089H
D
IH
D
OUT
1
X
X
when the WSM is
provide device ID
# high.
0–15
IN
PP
= V
OUT
PPH1
RY/BY#
for data
V
V
V
X
X
X
X
X
X
OH
OH
OH
or