DSPIC30F6010 MICROCHIP [Microchip Technology], DSPIC30F6010 Datasheet - Page 213

• Manufacturer Part Number: DSPIC30F6010
• Description: High-Performance Digital Signal Controllers
• Manufacturer: MICROCHIP [Microchip Technology]

Timer2 and Timer3 Selection Mode .................................... 76
Timer2/3 Module ................................................................. 61
Timer4/5 Module ................................................................. 67
TimerQ (QEI Module) External Clock Timing
Characteristics .................................................................. 184
Timing Characteristics
Timing Diagrams
 2004 Microchip Technology Inc.
Gate Operation ........................................................... 58
Interrupt....................................................................... 59
Operation During Sleep Mode .................................... 58
Prescaler..................................................................... 58
Real-Time Clock ......................................................... 59
Register Map............................................................... 60
32-bit Synchronous Counter Mode ............................. 61
32-bit Timer Mode....................................................... 61
ADC Event Trigger...................................................... 64
Gate Operation ........................................................... 64
Interrupt....................................................................... 64
Operation During Sleep Mode .................................... 64
Register Map............................................................... 65
Timer Prescaler........................................................... 64
Register Map............................................................... 69
A/D Conversion
Bandgap Start-up Time............................................. 181
CAN Module I/O........................................................ 199
CLKOUT and I/O....................................................... 179
External Clock........................................................... 175
I
I
Input Capture (CAPX) ............................................... 185
Motor Control PWM Module...................................... 187
Motor Control PWM Module Falult............................ 187
OC/PWM Module ...................................................... 186
Oscillator Start-up Timer ........................................... 180
Output Compare Module........................................... 185
Power-up Timer ........................................................ 180
QEI Module Index Pulse ........................................... 189
Reset......................................................................... 180
SPI Module
TimerQ (QEI Module) External Clock ....................... 184
Type A, B and C Timer External Clock ..................... 182
Watchdog Timer........................................................ 180
Center Aligned PWM .................................................. 89
Dead-Time .................................................................. 91
Edge Aligned PWM..................................................... 88
PWM Output ............................................................... 77
Time-out Sequence on Power-up
(MCLR Not Tied to V
Time-out Sequence on Power-up
(MCLR Not Tied to V
2
2
C Bus Data
C Bus Start/Stop Bits
RTC Interrupts .................................................... 59
RTC Oscillator Operation.................................... 59
10-Bit High-speed (CHPS = 01,
SIMSAM = 0, ASAM = 0, SSRC = 000) ............ 202
10-Bit High-speed (CHPS = 01,
SIMSAM = 0, ASAM = 1,
SSRC = 111, SAMC = 00001) .......................... 203
Master Mode ..................................................... 195
Slave Mode ....................................................... 197
Master Mode ..................................................... 195
Slave Mode ....................................................... 197
Master Mode (CKE = 0) .................................... 190
Master Mode (CKE = 1) .................................... 191
Slave Mode (CKE = 0) ...................................... 192
Slave Mode (CKE = 1) ...................................... 193
DD
DD
), Case 1.............................. 142
), Case 2.............................. 142
Preliminary
Timing Diagrams.See Timing Characteristics
Timing Requirements
Timing Specifications
Trap Vectors ....................................................................... 40
U
UART
Time-out Sequence on Power-up
(MCLR Tied to V
A/D Conversion
Bandgap Start-up Time ............................................ 181
Brown-out Reset....................................................... 181
CAN Module I/O ....................................................... 199
CLKOUT and I/O ...................................................... 179
External Clock .......................................................... 176
I
I
Input Capture............................................................ 185
Motor Control PWM Module ..................................... 187
Oscillator Start-up Timer........................................... 181
Output Compare Module .......................................... 185
Power-up Timer ........................................................ 181
QEI Module
Quadrature Decoder................................................. 188
Reset ........................................................................ 181
Simple OC/PWM Mode ............................................ 186
SPI Module
Type A Timer External Clock.................................... 182
Type B Timer External Clock.................................... 183
Type C Timer External Clock.................................... 183
Watchdog Timer ....................................................... 181
PLL Clock ................................................................. 177
Address Detect Mode ............................................... 111
Auto Baud Support ................................................... 112
Baud Rate Generator ............................................... 111
Enabling and Setting Up UART ................................ 109
Loopback Mode ........................................................ 111
Module Overview...................................................... 107
Operation During CPU Sleep and Idle Modes.......... 112
Receiving Data ......................................................... 110
Reception Error Handling ......................................... 110
Transmitting Data ..................................................... 109
2
2
C Bus Data (Master Mode) .................................... 196
C Bus Data (Slave Mode) ...................................... 198
10-Bit High-speed............................................. 204
External Clock .................................................. 184
Index Pulse....................................................... 189
Master Mode (CKE = 0).................................... 190
Master Mode (CKE = 1).................................... 191
Slave Mode (CKE = 0)...................................... 192
Slave Mode (CKE = 1)...................................... 194
Disabling........................................................... 109
Enabling ........................................................... 109
Setting Up Data, Parity and Stop Bit
Selections ......................................................... 109
In 8-bit or 9-bit Data Mode................................ 110
Interrupt ............................................................ 110
Receive Buffer (UxRCB)................................... 110
Framing Error (FERR) ...................................... 111
Idle Status ........................................................ 111
Parity Error (PERR) .......................................... 111
Receive Break .................................................. 111
Receive Buffer Overrun Error (OERR Bit) ........ 110
In 8-bit Data Mode ............................................ 109
In 9-bit Data Mode ............................................ 109
Interrupt ............................................................ 110
Transmit Buffer (UxTXB) .................................. 109
dsPIC30F6010
DD
) ................................................. 142
DS70119D-page 211