LM3S1911-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S1911-IQC20-A0 Datasheet - Page 261
![no-image](/images/no-image-200.jpg)
LM3S1911-IQC20-A0
Manufacturer Part Number
LM3S1911-IQC20-A0
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S1911-IQC20-A0.pdf
(426 pages)
- Current page: 261 of 426
- Download datasheet (5Mb)
October 09, 2007
Bit/Field
7:0
9
8
Name
DATA
PE
FE
Type
R/W
RO
RO
Reset
0
0
0
Preliminary
Description
UART Parity Error
This bit is set to 1 when the parity of the received data character does
not match the parity defined by bits 2 and 7 of the UARTLCRH register.
In FIFO mode, this error is associated with the character at the top of
the FIFO.
UART Framing Error
This bit is set to 1 when the received character does not have a valid
stop bit (a valid stop bit is 1).
Data Transmitted or Received
When written, the data that is to be transmitted via the UART. When
read, the data that was received by the UART.
LM3S1911 Microcontroller
261
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