LM3S1911-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S1911-IQC20-A0 Datasheet - Page 341

• Manufacturer Part Number: LM3S1911-IQC20-A0
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

14.3
October 09, 2007
Figure 14-13. Slave Command Sequence
Initialization and Configuration
The following example shows how to configure the I
This assumes the system clock is 20 MHz.
1.
2.
3.
4.
5.
Enable the I
Control module.
Enable the clock to the appropriate GPIO module via the RCGC2 register in the System Control
module.
In the GPIO module, enable the appropriate pins for their alternate function using the
GPIOAFSEL register. Also, be sure to enable the same pins for Open Drain operation.
Initialize the I
Set the desired SCL clock speed of 100 Kbps by writing the I2CMTPR register with the correct
value. The value written to the I2CMTPR register represents the number of system clock periods
in one SCL clock period. The TPR value is determined by the following equation:
NO
TREQ bit=1?
Write data to
I2CSDR
2
C clock by writing a value of 0x0000.1000 to the RCGC1 register in the System
2
C Master by writing the I2CMCR register with a value of 0x0000.0020.
YES
NO
Write OWN Slave
also valid
Read I2CSCSR
FBR is
Read data from
RREQ bit=1?
Write -------1 to
Preliminary
Address to
I2CSOAR
I2CSCSR
I2CSDR
Idle
YES
2
C module to send a single byte as a master.
LM3S1911 Microcontroller
341