LM3S1911-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S1911-IQC20-A0 Datasheet - Page 376

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LM3S1911-IQC20-A0

Manufacturer Part Number
LM3S1911-IQC20-A0
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
Analog Comparators
376
Bit/Field
3:2
1
0
reserved
Name
CINV
ISEN
Type
R/W
R/W
RO
Reset
0x0
0
0
Preliminary
Description
Interrupt Sense
The ISEN field specifies the sense of the comparator output that
generates an interrupt. The sense conditioning is as follows:
Comparator Output Invert
The CINV bit conditionally inverts the output of the comparator. If 0, the
output of the comparator is unchanged. If 1, the output of the comparator
is inverted prior to being processed by hardware.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Value
0x0
0x1
0x2
0x3
Function
Level sense, see ISLVAL
Falling edge
Rising edge
Either edge
October 09, 2007

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