HD64336901G Renesas Technology, HD64336901G Datasheet - Page 218

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HD64336901G

Manufacturer Part Number
HD64336901G
Description
(HD64xxx Series) 16-BIT MICROCONTROLLER
Manufacturer
Renesas Technology
Datasheet
14.3.1
RSR is a shift register that is used to receive serial data input from the RXD pin and convert it into
parallel data. When one frame of data has been received, it is transferred to RDR automatically.
RSR cannot be directly accessed by the CPU.
14.3.2
RDR is an 8-bit register that stores received data. When SCI3 has received one frame of serial
data, it transfers the received serial data from RSR to RDR, where it is stored. After this, RSR is
receive-enabled. As RSR and RDR function as a double buffer in this way, continuous receive
operations are possible. After confirming that the RDRF bit in SSR is set to 1, read RDR only
once. RDR cannot be written to by the CPU. RDR is initialized to H'00.
14.3.3
TSR is a shift register that transmits serial data. To perform serial data transmission, SCI3 first
transfers transmit data from TDR to TSR automatically, then sends the data that starts from the
LSB to the TXD pin
14.3.4
TDR is an 8-bit register that stores data for transmission. When SCI3 detects that TSR is empty, it
transfers the transmit data written in TDR to TSR and starts transmission. The double-buffered
structure of TDR and TSR enables continuous serial transmission. If the next transmit data has
already been written to TDR during transmission of one-frame data, SCI3 transfers the written
data to TSR to continue transmission. To achieve reliable serial transmission, write transmit data
to TDR only once after confirming that the TDRE bit in SSR is set to 1. TDR is initialized to
H'FF.
Rev. 1.00, 11/03, page 190 of 376
Receive Shift Register (RSR)
Receive Data Register (RDR)
Transmit Shift Register (TSR)
Transmit Data Register (TDR)
.
TSR cannot be directly accessed by the CPU.

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