HD64336901G Renesas Technology, HD64336901G Datasheet - Page 58

no-image

HD64336901G

Manufacturer Part Number
HD64336901G
Description
(HD64xxx Series) 16-BIT MICROCONTROLLER
Manufacturer
Renesas Technology
Datasheet
2.4.2
H8/300H CPU instructions consist of 2-byte (1-word) units. An instruction consists of an
operation field (op field), a register field (r field), an effective address extension (EA field), and a
condition field (cc).
Figure 2.7 shows examples of instruction formats.
Operation Field: Indicates the function of the instruction, the addressing mode, and the operation
to be carried out on the operand. The operation field always includes the first four bits of the
instruction. Some instructions have two operation fields.
Register Field: Specifies a general register. Address registers are specified by 3 bits, and data
registers by 3 bits or 4 bits. Some instructions have two register fields. Some have no register
field.
Effective Address Extension: 8, 16, or 32 bits specifying immediate data, an absolute address, or
a displacement. A24-bit address or displacement is treated as a 32-bit data in which the first 8 bits
are 0 (H'00).
Condition Field: Specifies the branching condition of Bcc instructions.
Rev. 1.00, 11/03, page 30 of 376
Basic Instruction Formats
(1) Operation field only
(2) Operation field and register fields
(3) Operation field, register fields, and effective address extension
(4) Operation field, effective address extension, and condition field
op
op
op
Figure 2.7 Instruction Formats
cc
EA(disp)
op
r n
r n
EA(disp)
r m
r m
NOP, RTS, etc.
ADD.B Rn, Rm, etc.
MOV.B @(d:16, Rn), Rm
BRA d:8

Related parts for HD64336901G