HD64336901G Renesas Technology, HD64336901G Datasheet - Page 286

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HD64336901G

Manufacturer Part Number
HD64336901G
Description
(HD64xxx Series) 16-BIT MICROCONTROLLER
Manufacturer
Renesas Technology
Datasheet
Table 16.2 Analog Input Channels and Corresponding ADDR Registers
16.3.2
ADCSR consists of the control bits and conversion end status bits of the A/D converter.
Rev. 1.00, 11/03, page 258 of 376
Analog Input Channel
AN0
AN1
AN2
AN3
Bit
7
6
5
4
Bit Name
ADF
ADIE
ADST
SCAN
A/D Control/Status Register (ADCSR)
Initial
Value
0
0
0
0
A/D Data Register to Be Stored Results of A/D Conversion
ADDRA
ADDRB
ADDRC
ADDRD
R/W
R/W
R/W
R/W
R/W
Description
A/D End Flag
[Setting conditions]
[Clearing conditions]
A/D Interrupt Enable
A/D conversion end interrupt (ADI) request enabled by
ADF when 1 is set
A/D Start
Setting this bit to 1 starts A/D conversion. In single mode,
this bit is cleared to 0 automatically when conversion on
the specified channel is complete. In scan mode,
conversion continues sequentially on the specified
channels until this bit is cleared to 0 by software, a reset,
or a transition to standby mode.
Scan Mode
Selects single mode or scan mode as the A/D conversion
operating mode.
0: Single mode
1: Scan mode
When A/D conversion ends in single mode
When A/D conversion ends on all the channels
selected in scan mode
When 0 is written after reading ADF = 1

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