HD64336901G Renesas Technology, HD64336901G Datasheet - Page 88

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HD64336901G

Manufacturer Part Number
HD64336901G
Description
(HD64xxx Series) 16-BIT MICROCONTROLLER
Manufacturer
Renesas Technology
Datasheet
4.1.1
ABRKCR sets address break conditions.
[Legend]
X:
Rev. 1.00, 11/03, page 60 of 376
Bit
7
6
5
4
3
2
1
0
Don't care
Address Break Control Register (ABRKCR)
Bit Name
RTINTE
CSEL1
CSEL0
ACMP2
ACMP1
ACMP0
DCMP1
DCMP0
Initial
Value
1
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
RTE Interrupt Enable
When this bit is 0, the interrupt immediately after
executing RTE is masked and then one instruction must
be executed. When this bit is 1, the interrupt is not
masked.
Condition Select 1 and 0
These bits set address break conditions.
00: Instruction execution cycle
01: CPU data read cycle
10: CPU data write cycle
11: CPU data read/write cycle
Address Compare Condition Select 2 to 0
These bits comparison condition between the address set
in BAR and the internal address bus.
000: Compares 16-bit addresses
001: Compares upper 12-bit addresses
010: Compares upper 8-bit addresses
011: Compares upper 4-bit addresses
1XX: Reserved (setting prohibited)
Data Compare Condition Select 1 and 0
These bits set the comparison condition between the data
set in BDR and the internal data bus.
00: No data comparison
01: Compares lower 8-bit data between BDRL and data
10: Compares upper 8-bit data between BDRH and data
11: Compares 16-bit data between BDR and data bus
bus
bus

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