HD64336901G Renesas Technology, HD64336901G Datasheet - Page 278

• Manufacturer Part Number: HD64336901G
• Description: (HD64xxx Series) 16-BIT MICROCONTROLLER
• Manufacturer: Renesas Technology

Rev. 1.00, 11/03, page 250 of 376
Clear ACKBT in ICIER to 0
Clear RCVD in ICCR1 to 0
Clear TRS in ICCR1 to 0
Set ACKBT in ICIER to 1
Clear MST in ICCR1 to 0
Set RCVD in ICCR1 to 1
No
No
No
Clear STOP in ICSR.
Dummy-read ICDRR
Clear TEND in ICSR
Clear TDRE in ICSR
Read RDRF in ICSR
Read RDRF in ICSR
Read STOP in ICSR
Mater receive mode
Write 0 to BBSY
Read ICDRR
Read ICDRR
Read ICDRR
RDRF=1 ?
Last receive
RDRF=1 ?
STOP=1 ?
and SCP
End
- 1?
Yes
Yes
Yes
No
Figure 15.18 Sample Flowchart for Master Receive Mode
Yes
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
Note: Do not activate an interrupt during the execution of steps [1] to [3].
[1] Clear TEND, select master receive mode, and then clear TDRE.*
[2] Set acknowledge to the transmit device.*
[3] Dummy-read ICDDR.*
[4] Wait for 1 byte to be received
[5] Check whether it is the (last receive - 1).
[6] Read the receive data last.
[7] Set acknowledge of the final byte. Disable continuous reception (RCVD = 1).
[8] Read the (final byte - 1) of receive data.
[9] Wait for the last byte to be receive.
[10] Clear the STOP flag.
[11] Issue the stop condition.
[12] Wait for the creation of stop condition.
[13] Read the last byte of receive data.
[14] Clear RCVD.
[15] Set slave receive mode.
When one byte is received, steps [2] to [6] are skipped after step [1],
before jumping to step [7]. The step [8] is dammy-read in ICDRR.