HD64336901G Renesas Technology, HD64336901G Datasheet - Page 266

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HD64336901G

Manufacturer Part Number
HD64336901G
Description
(HD64xxx Series) 16-BIT MICROCONTROLLER
Manufacturer
Renesas Technology
Datasheet
15.4
The I
mode by setting FS in SAR.
15.4.1
Figure 15.3 shows the I
following a start condition always consists of 8 bits.
[Legend]
S:
SLA:
R/W:
A:
DATA: Transfer data
P:
Rev. 1.00, 11/03, page 238 of 376
(a) I
(b) I
S
S
1
1
2
2
2
C bus format (FS = 0)
C bus format (Start condition retransmission, FS = 0)
C bus interface can communicate either in I
Indicates the direction of data transfer: from the slave device to the master device when
R/W is 1, or from the master device to the slave device when R/W is 0.
Start condition. The master device drives SDA from high to low while SCL is high.
Slave address
Acknowledge. The receive device drives SDA to low.
Stop condition. The master device drives SDA from low to high while SCL is high.
SDA
SCL
I
Operation
SLA
SLA
2
7
7
C Bus Format
S
1
1
R/
R/
1
1
SLA
1-7
2
C bus formats. Figure 15.4 shows the I
A
A
1
1
R/
8
DATA
DATA
n1
n
Figure 15.3 I
Figure 15.4 I
9
A
m1
A
1
A/
m
1
1-7
DATA
2
S
1
2
C Bus Formats
2
C Bus Timing
n1 and n2: Transfer bit count (n1 and n2 = 1 to 8)
m1 and m2: Transfer frame count (m1 and m2
C bus mode or clocked synchronous serial
8
SLA
A/
1
7
9
A
P
1
1
2
R/
C bus timing. The first frame
1
1-7
m: Transfer frame count
n: Transfer bit count
DATA
(n = 1 to 8)
A
1
(m
8
1)
DATA
n2
9
A
m2
P
A/
1)
1
1
P

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