T89C51CC02 Atmel, T89C51CC02 Datasheet - Page 31

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T89C51CC02

Manufacturer Part Number
T89C51CC02
Description
8-Bit MCU
Manufacturer
Atmel
Datasheet

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8.4. Registers
PSW (S:8Eh)
Program Status Word Register.
Reset Value= 0000 0000b
AUXR1 (S:A2h)
Auxiliary Control Register 1.
Reset Value= XXXX 00X0b
Rev.A - May 17, 2001
Bit Number Bit Mnemonic
Bit Number Bit Mnemonic
CY
4-3
7-6
7
7
6
5
2
1
0
7
5
4
3
2
1
0
-
ENBOOT
RS1:0
GF3
DPS
AC
OV
CY
AC
F0
F1
6
P
6
0
-
-
-
-
Carry Flag
Auxiliary Carry Flag
User Definable Flag 0.
Register Bank Select Bits
Overflow Flag
User Definable Flag 1.
Parity Bit
Reserved
Enable Boot Flash
Reserved
General Purpose Flag 3.
Always Zero
Reserved for Data Pointer Extension.
Data Pointer Select Bit
ENBOOT
Carry out from bit 1 of ALU operands.
Carry out from bit 1 of addition operands.
Refer to Table 15 for bits description.
Overflow set by arithmetic operations.
Set when ACC contains an odd number of 1’s.
Cleared when ACC contains an even number of 1’s.
The value read from these bits is indeterminate. Do not set these bits.
Set this bit for map the boot flash between F800h -FFFFh
Clear this bit for disable boot flash.
The value read from this bit is indeterminate. Do not set this bit.
This bit is stuck to logic 0 to allow INC AUXR1 instruction without affecting GF3 flag.
Set to select second dual data pointer: DPTR1.
Clear to select first dual data pointer: DPTR0.
F0
5
5
Figure 17. AUXR1 Register
Figure 16. PSW Register
Preliminary
RS1
4
4
-
GF3
RS0
3
3
Description
Description
OV
2
2
0
T89C51CC02
F1
1
1
-
DPS
P
0
0
31

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