T89C51CC02 Atmel, T89C51CC02 Datasheet - Page 69

• Manufacturer Part Number: T89C51CC02
• Description: 8-Bit MCU
• Manufacturer: Atmel

15.3. CAN Controller Mailbox and Registers Organization
A pagination allows management of the 48 registers and the 32 (4x8) bytes of the mailbox via 28SFR’s.
All actions on message object window SFRs are reflected to the corresponding message object registers.
Rev.A - May 17, 2001
message object Window SFRs
message object Control & DLC
(message object number) (Data offset)
Enable Interrupt message object
Status Interrupt message object
General Interrupt
message object Status
TimStmp High
Enable Interrupt
TimStmp Low
General Control
Enable message object
CANTimer High
Message Data
CANTimer Low
General Status
Bit Timing - 1
Bit Timing - 2
Bit Timing - 3
ID Mask - 1
ID Mask - 2
ID Mask - 3
ID Mask - 4
Timer Control
TimTTC Low
TimTTC High
ID Tag - 1
ID Tag - 2
ID Tag - 3
ID Tag - 4
TEC counter
REC counter
Page message object
SFR’s
8 bytes
Figure 57. CAN Controller memory organization
Ch.0 - Message Data - byte 0
message object 0 - Control & DLC
Ch.0 TimStmp High
Ch.0 TimStmp Low
Ch.0 - ID Mask - 4
Ch.0 - ID Mask- 1
Ch.0 - ID Mask- 2
Ch.0 - ID Mask- 3
message object 0 - Status
Ch.0 - ID Tag - 1
Ch.0 - ID Tag - 2
Ch.0 - ID Tag - 3
Ch.0 - ID Tag - 4
Preliminary
on-chip CAN Controller registers
4 message objects
Ch.3 - Message Data - byte 0
message object 3 - Control & DLC
Ch.3 TimStmp High
Ch.3 TimStmp Low
message object 3 - Status
Ch.3 - ID Mask - 1
Ch.3 - ID Mask - 2
Ch.3 - ID Mask - 3
Ch.3 - ID Mask - 4
Ch.3 - ID Tag - 4
Ch.3 - ID Tag - 1
Ch.3 - ID Tag - 2
Ch.3 - ID Tag - 3
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