T89C51CC02 Atmel, T89C51CC02 Datasheet - Page 116

• Manufacturer Part Number: T89C51CC02
• Description: 8-Bit MCU
• Manufacturer: Atmel

T89C51CC02
17.4. ADC Converter Operation
A start of single A/D conversion is triggered by setting bit ADSST (ADCON.3).
The busy flag ADSST(ADCON.3) is automatically set when an A/D conversion is running. After completion of
the A/D conversion, it is cleared by hardware. This flag can be read only, a write has no effect.
The end-of-conversion flag ADEOC (ADCON.4) is set when the value of conversion is available in ADDH and
ADDL, it is cleared by software. If the bit EADC (IEN1.1) is set, an interrupt occur when flag ADEOC is set
(see Figure 120). Clear this flag for re-arming the interrupt.
The bits SCH0 to SCH2 in ADCON register are used for the analog input channel selection.
Before Starting Power reduction modes the ADC conversion has to be completed.
17.5. Voltage Conversion
When the ADCIN is equals to VAREF the ADC converts the signal to 3FFh (full scale). If the input voltage
equals VAGND, the ADC converts it to 000h. Input voltage between VAREF and VAGND are a straight-line
linear conversion. All other voltages will result in 3FFh if greater than VAREF and 000h if less than VAGND.
Note that ADCIN should not exceed VAREF absolute maximum range!
116
SCH2
0
0
0
0
1
1
1
1
SCH1
0
0
1
1
0
0
1
1
Table 22. Selected Analog input
Preliminary
SCH0
0
1
0
1
0
1
0
1
Selected Analog input
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
Rev.A - May 17, 2001