T89C51CC02 Atmel, T89C51CC02 Datasheet - Page 16

• Manufacturer Part Number: T89C51CC02
• Description: 8-Bit MCU
• Manufacturer: Atmel

T89C51CC02
6.3. Register
CKCON (S:8Fh)
Clock Control Register
NOTE:
1. This control bit is validated when the CPU clock bit X2 is set; when X2 is low, this bit has no effect.
Reset Value = 0000 0000b
16
Bit Number Bit Mnemonic
CANX2
7
7
6
5
4
3
2
1
0
WDX2
CANX2
PCAX2
WDX2
T2X2
T1X2
T0X2
SIX2
X2
6
CAN clock (1)
Watchdog clock (1)
Programmable Counter Array clock (1)
Enhanced UART clock (MODE 0 and 2) (1)
Timer2 clock (1)
Timer1 clock (1)
Timer0 clock (1)
CPU clock
PCAX2
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Clear to select 12 clock periods per machine cycle (STD mode) for CPU and all the peripherals.
Set to select 6 clock periods per machine cycle (X2 mode) and to enable the individual peripherals "X2"bits.
5
Figure 5. CKCON Register
Preliminary
SIX2
4
T2X2
3
Description
T1X2
2
T0X2
Rev.A - May 17, 2001
1
X2
0