AM79C973KCW Advanced Micro Devices, AM79C973KCW Datasheet - Page 201

no-image

AM79C973KCW

Manufacturer Part Number
AM79C973KCW
Description
PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
Manufacturer
Advanced Micro Devices
Datasheet
Reg
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
Bits
8:7
15
14
13
12
11
10
9
6
5
4
3
2
1
0
SQE_TEST Disable
Extended Distance
Disable Link Pulse
Polarity Correction
Force Link Good
Receive Polarity
Jabber Detect
Disable (10M)
Disable (10M)
TX_DISABLE
Auto Receive
PHY Isolated
SDISALIGN
SDISSCR
Reversed
Reserved
EN_FEFI
TX_CRS
LBK[1-0]
(100M)
(100M)
Enable
(100M)
(100M)
Enable
Name
(10M)
(10M)
(10M)
(10M)
Table 50. ANR17: PHY Control/Status Register (Register 17)
1 = pass unaligned data to internal PHY
0 = enable alignment block
1 = disable scrambler/descrambler
0 = enable scrambler/descrambler
1 = link status forced to link up state.
0 = link status is determined by the device.
1 = Link pulses sent from the
10BASE-T transmitter are suppressed.
1 = Disables the SQE heartbeat which
occurs after each 10BASE-T transmission.
0 = The heart beat assertion occurs on the
COL pin approximately 1 µs after
transmission and for a duration of 1 µs.
1 = enable FEFI, 0 = disable FEFI
This bit is ignored if auto-neg is enabled.
1 = disable jabber detect
0 = enable jabber detect
00 = normal operation
01 = unused
10 = unused
11 = serial loopback
1 = Receive polarity of the 10BASE-T
receiver is reversed.
0 = Receive polarity is correct.
1 = polarity correction circuit is disabled for
10BASE-T.
0 = Self correcting polarity circuit is enabled
1 = 10BASE-T receive squelch thresholds
are reduced to allow reception of frames
which are greater than 100 meters.
0 = Squelch thresholds are set for standard
distance of 100 meters.
1 = TX± outputs not active for MLT-3 and
10BASE-T. TX± outputs to logical “0” for
PECL.
0 = Transmit valid data.
1 = CRS is asserted when transmit or
receive medium is active.
0 = CRS is asserted when receive medium
is active.
Reserved.
1 = Internal PHY is isolated
0 = Internal PHY is enabled
P R E L I M I N A R Y
Am79C973/Am79C975
Description
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
Reset
H/W
0/1
00
0
0
0
0
0
0
0
0
0
0
0
1
0
Soft Reset
Previous
Previous
Retains
Retains
Value
Value
0/1
00
0
0
0
0
0
0
0
0
0
1
0
201

Related parts for AM79C973KCW