K9F1208D0B-D Samsung semiconductor, K9F1208D0B-D Datasheet - Page 33

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K9F1208D0B-D

Manufacturer Part Number
K9F1208D0B-D
Description
64M x 8 Bit NAND Flash Memory
Manufacturer
Samsung semiconductor
Datasheet
K9F1208Q0B
K9F1208D0B
K9F1208U0B
Figure 9. Sequential Row Read1 Operation
Figure 8. Read2 Operation
R/B
I/O
CLE
CE
WE
ALE
R/B
RE
I/O
X
X
The Sequential Read 1 and 2 operation is allowed only within a block and after the last page of a block is read-
out, the sequential read operation must be terminated by bringing CE high. When the page address moves onto
the next block, read command and address must be given.
00h
01h
50h
Block
A
Start Add.(4Cycle)
0
~ A
A
0
~ A
7
Start Add.(4Cycle)
1st half array
& A
7
& A
9
~ A
( 00h Command)
Data Field
9
~ A
25
25
2nd half array
t
R
Spare Field
Data Output
Data Field
t
R
Main array
1st
1st
2nd
Nth
(only for K9F1208U0B-Y,P and K9F1208U0B-V,F valid within a block)
33
On K9F1208U0B-Y,P or K9F1208U0B-V,F
CE must be held low during tR
Spare Field
t
R
1st half array
Data Output
( 01h Command)
(528 Byte)
Data Field
Data Output(Sequential)
2nd
Spare Field
2nd half array
FLASH MEMORY
Spare Field
t
R
1st
2nd
Nth
Advance
Data Output
(528 Byte)
Nth

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