K9F1208D0B-D Samsung semiconductor, K9F1208D0B-D Datasheet - Page 8

• Manufacturer Part Number: K9F1208D0B-D
• Description: 64M x 8 Bit NAND Flash Memory
• Manufacturer: Samsung semiconductor

K9F1208Q0B
K9F1208D0B
K9F1208U0B
Figure 1-1. K9F1208X0B FUNCTIONAL BLOCK DIAGRAM
Figure 2-1. K9F1208X0B ARRAY ORGANIZATION
V
V
(=4,096 Blocks)
CC
SS
128K Pages
NOTE : Column Address : Starting Address of the Register.
2nd Cycle
3rd Cycle
4th Cycle
1st Cycle
CE
RE
WE
00h Command(Read) : Defines the starting address of the 1st half of the register.
01h Command(Read) : Defines the starting address of the 2nd half of the register.
Command
* A
* L must be set to "Low".
* The device ignores any additional input of address cycles than reguired.
A
A
8
9
0
is set to "Low" or "High" by the 00h or 01h Command.
- A
- A
1st half Page Register
(=256 Bytes)
25
7
I/O 0
A
A
A
A
17
25
0
9
& High Voltage
Page Register
CLE ALE
Control Logic
512Byte
512 Byte
I/O 1
Command
X-Buffers
Latches
& Decoders
Y-Buffers
Latches
& Decoders
Generator
A
A
A
Register
*L
10
18
1
2nd half Page Register
(=256 Bytes)
A
8
I/O 2
WP
A
A
A
*L
11
19
2
I/O 3
A
A
16 Byte
16 Byte
A
*L
12
20
3
I/O 4
8
A
A
A
*L
13
21
4
I/O 0 ~ I/O 7
Global Buffers
(512 + 16)Byte x 131072
I/O 5
Page Register & S/A
I/O Buffers & Latches
A
A
A
*L
14
22
512M + 16M Bit
5
NAND Flash
8 bit
Y-Gating
ARRAY
1 Block =32 Pages
= (16K + 512) Byte
1 Page = 528 Byte
1 Block = 528 Byte x 32 Pages
1 Device = 528Bytes x 32Pages x 4096 Blocks
I/O 6
A
A
A
*L
15
23
6
= (16K + 512) Byte
= 528 Mbits
I/O 7
A
A
A
*L
16
24
7
Output
Driver
FLASH MEMORY
Column Address
Row Address
(Page Address)
V
V
CC/
SS
Advance
I/0 0
I/0 7
V
CCQ