ST52F510FMB6 STMICROELECTRONICS [STMicroelectronics], ST52F510FMB6 Datasheet - Page 22

• Manufacturer Part Number: ST52F510FMB6
• Description: 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST52F510/F513/F514
NVM is always located beginning after the first
locations of the addressing space. RAM banks are
always located after NVM.
NVM is organized in accordance to the following
blocks (see Figure 3.2):
Figure 3.2 Program/Data Memory Organization
22/106
Reset Vector block (from address 0 to 2)
contains an absolute jump instruction to the first
user program instruction. The Assembler tool
automatically fills these locations with correct
data.
Interrupt Vectors block (from location 3 up to
32) contains the interrupt vectors. Each address
is composed of three bytes (the jump opcode
and the 16 bit address). Interrupt vectors are set
by using IRQ pseudo-instruction (see the
Programming Manual).
FFFFh
20FFh
307Fh
3000h
0400h
0021h
0003h
0000h
2000h
~
~
PROGRAM INSTRUCTIONS
PROGRAM INSTRUCTIONS
MEMBERSHIP FUNCTIONS
AND PERMANENT DATA
AND PERMANENT DATA
INTERRUPT VECTORS
RESET VECTOR
SYSTEM STACK
OPTION BYTES
USER STACK
PARAMETERS
DATA
Mbfs Setting block (just after the interrupt
vectors) contains the coordinates of the vertexes
of every Mbf defined in the program. The last
address that can be assigned to this block is
1023. This area is dynamically assigned
according to the size of the fuzzy routines. The
memory area that remains unused, if any, is
assigned to the Program Instructions block.
The Program Instructions block (just after the
last Mbf data through the last NVM address)
contains the instruction of the user program and
the permanent data.
Option bytes block (from location
307Fh) is the addressing space reserved for the
option bytes. In ST52F510/F513/F514, only the
location from 3000h to 3007h are used.
~
~
ADDRESSABLE
VOLATILE
BENCH
MEMORY
SPACE NOT
RAM
NON
3000h to