ST52F510FMB6 STMICROELECTRONICS [STMicroelectronics], ST52F510FMB6 Datasheet - Page 23

• Manufacturer Part Number: ST52F510FMB6
• Description: 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Flash and EEPROM are programmed electrically
just applying the supply voltage (2.7 V to 5.5 V) and
it is also erased electrically; this feature allows the
user to easily reprogram the memory without
taking the device off from the board (In Situ
Programming ISP). Data and commands are
transmitted through the I
protocol. Data can also be written run-time with the
In Application Programming (IAP)
NVM can be locked by the user during the
programming phase, in order to prevent external
operation such as reading the program code and
assuring protection of user intellectual property.
Flash and EEPROM pages can be protected by
unintentional writings.
The operations that can be performed on the NVM
during the Programming Phase, ISP and IAP are
described in detail in the Section 4.
Figure 3.3 System and User Stack
SYSTEM STACK
USER STACK
POINTER
POINTER
20FFh
20FEh
2001h
2000h
USER STACK LEVEL 4
USER STACK LEVEL 3
USER STACK LEVEL 2
USER STACK LEVEL 1
2
C serial communication
SYSTEM STACK
SYSTEM STACK
SYSTEM STACK
SYSTEM STACK
RAM BENCH
USER DATA
LEVEL 1
LEVEL 2
LEVEL 3
LEVEL 4
PUSH X
IRQ
3.4 System and User Stacks
The System and User Stacks are located in the
Program/Data memory in the RAM benches.
System Stacks are used to push the Program
Counter (PC) after an Interrupt Request or a
Subroutine Call. After a RET (Return from a
subroutine) or a RETI (Return from an interrupt)
the PC that is saved is popped from the stack and
restored. After an interrupt request, the flags are
also saved in a reserved stack inside the core, so
each interrupt has its own flags.
The System Stack is located in the last RAM bench
starting from the last address (255) inside the
bench page. The System Stack Pointer (SSP) can
be read and modified by the user. For each level of
stack 2 bytes of the RAM are used. The SSP points
to the first currently available stack position. When
a subroutine call or interrupt request occurs, the
content of the PC is stored in a couple of locations
pointed to by the SSP that is decreased by 2.
POP X
RETI
CONFIGURATION REGISTERS
PROGRAM COUNTER
USER STACK TOP MSB
USER STACK TOP LSB
LOCATION ADRESS
PAGE NUMBER
REGISTER FILE
REGISTER X
ST52F510/F513/F514
LSB
MSB
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