K9K1G08U0M-YIB0 Samsung semiconductor, K9K1G08U0M-YIB0 Datasheet - Page 29

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K9K1G08U0M-YIB0

Manufacturer Part Number
K9K1G08U0M-YIB0
Description
128M x 8 Bit NAND Flash Memory
Manufacturer
Samsung semiconductor
Datasheet
While any block in each plane may be addressable for Multi-Plane Page Program, the five least significant addresses(A9-A13) for the
selected pages at one operation must be the same. Figure 15 shows an example where 2nd page of each addressed block is
selected for four planes. However, any arbitrary sequence is allowed in addressing multiple planes as shown in Figure16.
Restriction in addressing with Multi Plane Page Program
Figure 16. Addressing Multiple Planes
Multi-Plane Block Erase into Plane 0~3 or Plane 4~7
Basic concept of Multi-Plane Block Erase operation is identical to that of Multi-Plane Page Program. Up to four blocks, one from each
plane can be simultaneously erased. Standard Block Erase command sequences (Block Erase Setup command followed by three
address cycles) may be repeated up to four times for erasing up to four blocks. Only one block should be selected from each plane.
The Erase Confirm command initiates the actual erasing process. The completion is detected by analyzing R/B pin or Ready/Busy
status (I/O 6). Upon the erase completion, pass/fail status of each block is examined by reading extended pass/fail status(I/O 1
through I/O 4).
Figure 18. Four Block Erase Operation
K9K1G08U0M-YCB0, K9K1G08U0M-YIB0
R/B
I/O
Figure 15. Multi-Plane Program & Read Status Operation
Figure 17. Multi-Plane Page Program & Read Status Operation
R/B
I/O
0
0
~
~
7
7
Block 0
80h
60h
Plane 0
(1024 Block)
Page 30
Page 31
Page 0
Page 1
A
0
~ A
(3 Cycle)
80h
Address
Plane 2
7
& A
9
Last Plane input
~ A
A
2 6
Address & Data Input
60h
0
528 Byte Data
~ A
11h
7
& A
(3 Cycle)
Address
9
80h
~ A
Block 1
2 6
Plane 1
(1024 Block)
Page 30
Page 31
Page 0
Page 1
60h
Plane 0
10h
(3 Cycle)
Address
11h
29
60h
80h
t
PROG
Plane 2
(1024 Block)
(3 Cycle)
Address
Block 2
Plane3
Page 30
Page 31
Page 0
Page 1
D0h
11h
71h
t
BERS
80h
FLASH MEMORY
71h
Plane 1
Plane 3
(1024 Block)
Block 3
Page 30
Page 31
Fail
Page 0
Page 1
I/O
Fail
I/O
10h
Pass
Pass

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