K9K1G08U0M-YIB0 Samsung semiconductor, K9K1G08U0M-YIB0 Datasheet - Page 35

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K9K1G08U0M-YIB0

Manufacturer Part Number
K9K1G08U0M-YIB0
Description
128M x 8 Bit NAND Flash Memory
Manufacturer
Samsung semiconductor
Datasheet
K9K1G08U0M-YCB0, K9K1G08U0M-YIB0
READY/BUSY
The device has a R/B output that provides a hardware method of indicating the completion of a page program, erase and random
read completion. The R/B pin is normally high but transitions to low after program or erase command is written to the command reg-
ister or random read is started after address loading. It returns to high when the internal controller has finished the operatio n. The pin
is an open-drain driver thereby allowing two or more R/ B outputs to be Or-tied. Because pull-up resistor value is related to tr(R/B)
and current drain during busy(ibusy) , an appropriate value can be obtained with the following reference chart(Fig 24). Its value can
be determined by the following guidance.
V
CC
GND
Rp value guidance
Rp(min) =
where I
Rp(max) is determined by maximum permissible limit of tr
Device
L
is the sum of the input currents of all devices tied to the R/B pin.
V
CC
(Max.) - V
R/B
open drain output
I
OL
+ I
Rp
OL
100n
L
200n
300n
(Max.)
ibusy
=
Ready Vcc
3.3
1K
96
4.2
Fig 24 Rp vs tr ,tf & Rp vs ibusy
@ Vcc = 3.3V, Ta = 25
8mA + I
35
Ibusy
3.2V
tf
tr
L
tf
1.65
189
4.2
2K
0.8V
Rp(ohm)
C , C
290
1.1
3K
4.2
Busy
L
= 100pF
FLASH MEMORY
0.825
381
4.2
4K
tr
2m
3m
1m
2.0V

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