PXA250 INTEL [Intel Corporation], PXA250 Datasheet - Page 43

• Manufacturer Part Number: PXA250
• Description: Intel-R PXA250 and PXA210 Applications Processors
• Manufacturer: INTEL [Intel Corporation]

4.8.1
4.8.2
Datasheet
Figure 8. LCD AC Timing Definitions
Table 21. LCD AC Timing Specifications
LCD Module AC Timing
Figure 8 describes the LCD timing parameters. The LCD pin timing specifications are referenced
to the pixel clock (L_PCLK). Values for the parameters are given in Table 21.
SSP Module AC Timing
Figure 9, “SSP AC Timing Definitions” on page 44 describes the SSP timing parameters. The SSP
pin timing specifications are referenced to SCLK_C. Values for the parameters are given in
Table 22, “SSP AC Timing Specifications” on page 44.
NOTES:
1. You can program the LCD data pins to be driven on either the rising or falling edge of the pixel clock
2. These LCD signals can, at times, transition when L_PCLK is not clocking (between frames). At this time,
Symbol
Tpclkdv
Tpclkbv
(L_PCLK).
they are clocked with the internal version of the pixel clock before it is driven out onto the L_PCLK pin.
Tpclklv
Tpclkfv
L_LDD[7:0]
L_LDD[7:0]
L_PCLK
L_LCLK
L_FCLK
L_BIAS
(rise)
(fall)
Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210
L_PCLK rise/fall to L_LDD<7:0> driven
valid
L_PCLK fall to L_LCLK driven valid
L_PCLK fall to L_LFCLK driven valid
L_PCLK rise to L_BIAS driven valid
Description
T pclkdv
T pclkbv
T pclklv
T pclkfv
Min
T pclkdv
Max
14
14
14
14
Units
ns
ns
ns
ns
A4775-01
Notes
1
2
2
2
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