HT68F14 HOLTEK [Holtek Semiconductor Inc], HT68F14 Datasheet - Page 116

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HT68F14

Manufacturer Part Number
HT68F14
Description
Enhanced I/O Flash Type MCU
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet

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HT68F13/HT68F14/HT68F15
Enhanced I/O Flash Type MCU
Rev. 1.10
Bit 7
Bit 6
Bit 5~4
Bit 3~0
LVD Interrupt
TM Interrupts
Name
POR
R/W
Bit
TBC Register
The Low Voltage Detector Interrupt is contained within the Multi-function Interrupt. A LVD Interrupt
request will take place when the LVD Interrupt request flag, LVF, is set, which occurs when the Low
Voltage Detector function detects a low power supply voltage. To allow the program to branch to its
respective interrupt vector address, the global interrupt enable bit, EMI, Low Voltage Interrupt enable
bit, LVE, and associated Multi-function interrupt enable bit, must first be set. When the interrupt is
enabled, the stack is not full and a low voltage condition occurs, a subroutine call to the Multi-function
Interrupt vector, will take place. When the Low Voltage Interrupt is serviced, the EMI bit will be
automatically cleared to disable other interrupts, however only the Multi-function interrupt request
flag will be also automatically cleared. As the LVF flag will not be automatically cleared, it has to be
cleared by the application program.
The Compact and Standard Type TMs have two interrupts each, while the Enhanced Type TM has
three interrupts. All of the TM interrupts are contained within the Multi-function Interrupts in these
devices except HT68F13. For each of the Compact and Standard Type TMs there are two interrupt
request flags TnPF and TnAF and two enable bits TnPE and TnAE. For the Enhanced Type TM there
are three interrupt request flags TnPF, TnAF and TnBF and three enable bits TnPE, TnAE and TnBE.
A TM interrupt request will take place when any of the TM request flags are set, a situation which
occurs when a TM comparator P, A or B match situation happens.
To allow the program to branch to its respective interrupt vector address, the global interrupt enable
bit, EMI, respective TM Interrupt enable bit, and relevant Multi-function Interrupt enable bit, MFnE,
must first be set. When the interrupt is enabled, the stack is not full and a TM comparator match
situation occurs, a subroutine call to the relevant Multi-function Interrupt vector locations, will take
place. When the TM interrupt is serviced, the EMI bit will be automatically cleared to disable other
interrupts, however only the related MFnF flag will be automatically cleared. As the TM interrupt
request flags will not be automatically cleared, they have to be cleared by the application program.
TBON
TBON: Time Base control
TBCK: Time Base clock f
TB1~TB0: Select Time Base Time-out Period
unimplemented, read as 0
R/W
0: disable
1: enable
0: f
1: f
00: 4096/f
01: 8192/f
10: 16384/f
11: 32768/f
7
0
TBC
SYS
/4
TB
TB
TB
TBCK
TB
R/W
6
0
TB
R/W
TB1
selection
5
1
116
TB0
R/W
4
1
3
2
1
February 9, 2011
0

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