HT68F14 HOLTEK [Holtek Semiconductor Inc], HT68F14 Datasheet - Page 129

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HT68F14

Manufacturer Part Number
HT68F14
Description
Enhanced I/O Flash Type MCU
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet

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CPL [m]
Description
Operation
Affected flag(s)
CPLA [m]
Description
Operation
Affected flag(s)
DAA [m]
Description
Operation
Affected flag(s)
DEC [m]
Description
Operation
Affected flag(s)
DECA [m]
Description
Operation
Affected flag(s)
HALT
Description
Operation
Affected flag(s)
Rev. 1.10
Complement Data Memory
Each bit of the specified Data Memory is logically complemented (1 s complement).
Bits which previously contained a 1 are changed to 0 and vice versa.
[m]
Z
Complement Data Memory with result in ACC
Each bit of the specified Data Memory is logically complemented (1 s complement).
Bits which previously contained a 1 are changed to 0 and vice versa. The complemented
result is stored in the Accumulator and the contents of the Data Memory remain un-
changed.
ACC
Z
Decimal-Adjust ACC for addition with result in Data Memory
Convert the contents of the Accumulator value to a BCD ( Binary Coded Decimal) value
resulting from the previous addition of two BCD variables. If the low nibble is greater
than 9 or if AC flag is set, then a value of 6 will be added to the low nibble. Otherwise the
low nibble remains unchanged. If the high nibble is greater than 9 or if the C flag is set,
then a value of 6 will be added to the high nibble. Essentially, the decimal conversion is
performed by adding 00H, 06H, 60H or 66H depending on the Accumulator and flag
conditions. Only the C flag may be affected by this instruction which indicates that if the
original BCD sum is greater than 100, it allows multiple precision decimal addition.
[m]
[m]
[m]
[m]
C
Decrement Data Memory
Data in the specified Data Memory is decremented by 1.
[m]
Z
Decrement Data Memory with result in ACC
Data in the specified Data Memory is decremented by 1. The result is stored in the Accu-
mulator. The contents of the Data Memory remain unchanged.
ACC
Z
Enter power down mode
This instruction stops the program execution and turns off the system clock. The con-
tents of the Data Memory and registers are retained. The WDT and prescaler are cleared.
The power down flag PDF is set and the WDT time-out flag TO is cleared.
TO
PDF
TO, PDF
0
[m]
ACC + 00H or
ACC + 06H or
ACC + 60H or
ACC + 66H
[m] 1
1
[m]
[m] 1
129
Enhanced I/O Flash Type MCU
HT68F13/HT68F14/HT68F15
February 9, 2011

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