HT68F14 HOLTEK [Holtek Semiconductor Inc], HT68F14 Datasheet - Page 84

• Manufacturer Part Number: HT68F14
• Description: Enhanced I/O Flash Type MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

HT68F13/HT68F14/HT68F15
Enhanced I/O Flash Type MCU
Note:
Rev. 1.10
TM O/P Pin
TM O/P Pin
Flag TnAF
CCRA Int.
Flag TnPF
CCRP Int.
TnPAU
TnPOL
CCRA
CCRP
TnON
Counter Value
(TnOC=1)
(TnOC=0)
1. Here TnDPX=1 -- Counter cleared by CCRA
2. A counter clear sets the PWM Period
3. The internal PWM function continues even when TnIO [1:0] = 00 or 01
4. The TnCCLR bit has no influence on PWM operation
PWM Duty Cycle
set by CCRP
Single Pulse Mode
To select this mode, bits TnM1 and TnM0 in the TMnC1 register should be set to 10 respectively and
also the TnIO1 and TnIO0 bits should be set to 11 respectively. The Single Pulse Output Mode, as the
name suggests, will generate a single shot pulse on the TM output pin.
The trigger for the pulse output leading edge is a low to high transition of the TnON bit, which can be
implemented using the application program. However in the Single Pulse Mode, the TnON bit can also
be made to automatically change from low to high using the external TCKn pin, which will in turn
initiate the Single Pulse output. When the TnON bit transitions to a high level, the counter will start
running and the pulse leading edge will be generated. The TnON bit should remain high when the
pulse is in its active state. The generated pulse trailing edge will be generated when the TnON bit is
cleared to zero, which can be implemented using the application program or when a compare match
occurs from Comparator A.
Counter cleared
by CCRA
PWM Mode -- TnDPX = 1
84
PWM Period
set by CCRA
Pause Resume
Output controlled by
other pin-shared function
TnDPX = 1; TnM [1:0] = 10
Counter Stop if
TnON bit low
PWM resumes
operation
Counter Reset when
TnON returns high
Output Inverts
when TnPOL = 1
February 9, 2011
Time