HT68F14 HOLTEK [Holtek Semiconductor Inc], HT68F14 Datasheet - Page 45

• Manufacturer Part Number: HT68F14
• Description: Enhanced I/O Flash Type MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

HT68F13/HT68F14/HT68F15
Enhanced I/O Flash Type MCU
Rev. 1.10
MP0
MP1
ACC
PCL
TBLP
TBHP
TBLH
STATUS
SMOD
LVDC
INTEG
WDTC
TBC
Reset Initial Conditions
Register
HT68F13 Register
The different types of reset described affect the reset flags in different ways. These flags, known as
PDF and TO are located in the status register and are controlled by various microcontroller operations,
such as the SLEEP or IDLE Mode function or Watchdog Timer. The reset flags are shown in the table:
Note: ²u² stands for unchanged
The following table indicates the way in which the various components of the microcontroller are af-
fected after a power-on reset occurs.
The different kinds of resets all affect the internal registers of the microcontroller in different ways.
To ensure reliable continuation of normal program execution after a reset occurs, it is important to
know what condition the microcontroller is in after a particular reset occurs. The following table de-
scribes how each type of reset affects each of the microcontroller internal registers.
Program Counter
Interrupts
WDT
Timer/Event Counter
Input/Output Ports
Stack Pointer
TO
0
u
1
1
0 0 0 0 0 0 0 0
- - x x x x x x
- - 0 0 x x x x
0 0 0 0 0 0 1 1
- - 0 0 - 0 0 0
- - - - 0 0 0 0
0 1 1 1 1 0 1 0
0 0 1 1 - - - -
1 x x x x x x x
1 x x x x x x x
x x x x x x x x
x x x x x x x x
- - - - - - x x
PDF
Item
(Power-on)
0
u
u
1
Reset
Power-on reset
RES or LVR reset during NORMAL or SLOW Mode operation
WDT time-out reset during NORMAL or SLOW Mode operation
WDT time-out reset during IDLE or SLEEP Mode operation
Reset to zero
All interrupts will be disabled
Clear after reset, WDT begins counting
Timer Counter will be turned off
I/O ports will be setup as inputs
Stack Pointer will point to the top of the stack
u u u u u u u u
0 0 0 0 0 0 0 0
u u u u u u u u
- - u u u u u u
- - u u u u u u
- - - - - - u u
0 0 0 0 0 0 1 1
- - 0 0 - 0 0 0
- - - - 0 0 0 0
0 1 1 1 1 0 1 0
0 0 1 1 - - - -
1 x x x x x x x
1 x x x x x x x
RES or LVR
Reset
RESET Conditions
45
Condition After RESET
(Normal Operation)
u u u u u u u u
0 0 0 0 0 0 0 0
u u u u u u u u
- - u u u u u u
- - 1 u u u u u
0 0 0 0 0 0 1 1
- - 0 0 - 0 0 0
0 1 1 1 1 0 1 0
WDT Time-out
1 x x x x x x x
1 x x x x x x x
- - - - - - u u
- - - - 0 0 0 0
0 0 1 1 - - - -
1 u u u u u u u
1 u u u u u u u
u u u u u u u u
0 0 0 0 0 0 0 0
u u u u u u u u
u u u u u u u u
u u u u u u u u
- - u u u u u u
- - 1 1 u u u u
- - u u - u u u
- - - - u u u u
u u u u - - - -
WDT Time-out
- - - - - - u u
February 9, 2011
(IDLE)