ATMEGA128-16AU SL383 Atmel, ATMEGA128-16AU SL383 Datasheet - Page 158
ATMEGA128-16AU SL383
Manufacturer Part Number
ATMEGA128-16AU SL383
Description
Manufacturer
Atmel
Datasheet
1.ATMEGA128-16AU_SL383.pdf
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ATmega128
Table 65. Compare Output Mode, Non-PWM Mode
Table 66
mode.
Table 66. Compare Output Mode, Fast PWM Mode
Note:
Table 67
PWM mode.
Table 67. Compare Output Mode, Phase Correct PWM Mode
Note:
• Bit 2:0 – CS22:0: Clock Select
The three clock select bits select the clock source to be used by the Timer/Counter.
Table 68. Clock Select Bit Description
COM21
CS22
COM21
COM21
0
0
0
0
1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the compare
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the compare
shows the COM21:0 bit functionality when the WGM21:0 bits are set to phase correct
shows the COM21:0 bit functionality when the WGM21:0 bits are set to fast PWM
COM20
CS21
match is ignored, but the set or clear is done at BOTTOM. See
for more details.
match is ignored, but the set or clear is done at TOP. See
153
0
0
1
1
0
0
1
0
1
for more details.
COM20
COM20
0
1
0
1
CS20
0
1
0
1
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on compare match when up-counting. Set OC2 on compare
match when downcounting.
Set OC2 on compare match when up-counting. Clear OC2 on compare
match when downcounting.
0
1
0
1
0
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on compare match, set OC2 at BOTTOM,
(non-inverting mode)
Set OC2 on compare match, clear OC2 at BOTTOM,
(inverting mode)
Description
No clock source (Timer/Counter stopped)
clk
clk
clk
clk
Description
Normal port operation, OC2 disconnected.
Toggle OC2 on compare match
Clear OC2 on compare match
Set OC2 on compare match
I/O
I/O
I/O
I/O
/(No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
(1)
(1)
“Phase Correct PWM Mode” on page
“Fast PWM Mode” on page 152
2467S–AVR–07/09
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