ATMEGA128-16AU SL383 Atmel, ATMEGA128-16AU SL383 Datasheet - Page 30

• Manufacturer Part Number: ATMEGA128-16AU SL383
• Manufacturer: Atmel

30
ATmega128
Figure 14. External Data Memory Cycles with SRWn1 = 0 and SRWn0 = 1
Note:
Figure 15. External Data Memory Cycles with SRWn1 = 1 and SRWn0 = 0
Note:
System Clock (CLK
System Clock (CLK
DA7:0 (XMBK = 0)
DA7:0 (XMBK = 1)
1. SRWn1 = SRW11 (upper sector) or SRW01 (lower sector), SRWn0 = SRW10 (upper sector) or
1. SRWn1 = SRW11 (upper sector) or SRW01 (lower sector), SRWn0 = SRW10 (upper sector) or
DA7:0 (XMBK = 0)
DA7:0 (XMBK = 1)
SRW00 (lower sector).
The ALE pulse in period T5 is only present if the next instruction accesses the RAM (internal
or external).
SRW00 (lower sector).
The ALE pulse in period T6 is only present if the next instruction accesses the RAM (internal
or external).
DA7:0
A15:8
CPU
ALE
WR
RD
DA7:0
A15:8
)
CPU
ALE
WR
RD
Prev. addr.
Prev. data
Prev. data
Prev. data
)
Prev. addr.
Prev. data
Prev. data
Prev. data
T1
T1
Address
Address
Address
T2
Address
Address
XX
Address
T2
XX
Address
T3
Data
Data
Data
Address
T3
Data
Data
Data
T4
T4
T5
(1)
(1)
T5
T6
2467S–AVR–07/09