ATMEGA128-16AU SL383 Atmel, ATMEGA128-16AU SL383 Datasheet - Page 226

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ATMEGA128-16AU SL383

Manufacturer Part Number
ATMEGA128-16AU SL383
Description
Manufacturer
Atmel
Datasheet
226
ATmega128
will be lost in the process. An example of an arbitration situation is depicted below, where two
masters are trying to transmit data to a slave receiver.
Figure 105. An Arbitration Example
Several different scenarios may arise during arbitration, as described below:
This is summarized in
Figure 106. Possible Status Codes Caused by Arbitration
Two or more masters are performing identical communication with the same slave. In this
case, neither the slave nor any of the masters will know about the bus contention.
Two or more masters are accessing the same slave with different data or direction bit. In this
case, arbitration will occur, either in the READ/WRITE bit or in the data bits. The masters
trying to output a one on SDA while another master outputs a zero will lose the arbitration.
Losing masters will switch to not addressed slave mode or wait until the bus is free and
transmit a new START condition, depending on application software action.
Two or more masters are accessing different slaves. In this case, arbitration will occur in the
SLA bits. Masters trying to output a one on SDA while another master outputs a zero will
lose the arbitration. Masters losing arbitration in SLA will switch to slave mode to check if
they are being addressed by the winning master. If addressed, they will switch to SR or ST
mode, depending on the value of the READ/WRITE bit. If they are not being addressed, they
will switch to not addressed slave mode or wait until the bus is free and transmit a new
START condition, depending on application software action.
SDA
SCL
START
TRANSMITTER
Device 1
MASTER
Address / General Call
Figure
Direction
received
Own
Yes
Arbitration lost in SLA
SLA
106. Possible status values are given in circles.
TRANSMITTER
Device 2
MASTER
Write
Read
No
Device 3
RECEIVER
SLAVE
68/78
38
B0
Arbitration lost in Data
........
TWI bus will be released and not addressed slave mode will be entered
A START condition will be transmitted when the bus becomes free
Data byte will be received and NOT ACK will be returned
Data byte will be received and ACK will be returned
Last data byte will be transmitted and NOT ACK should be received
Data byte will be transmitted and ACK should be received
Device n
Data
V
CC
R1
R2
2467S–AVR–07/09
STOP

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