MPC8306VMAFDCA Freescale Semiconductor, MPC8306VMAFDCA Datasheet - Page 4

• Manufacturer Part Number: MPC8306VMAFDCA
• Description: Microprocessors - MPU E300 MP 333
• Manufacturer: Freescale Semiconductor

Specifications of MPC8306VMAFDCA

• Rohs: yes
• Processor Series: PowerQUICC II Pro
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 233 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB, 48 KB
• Interface Type: CAN, Ethernet, I2C, SPI, UART, USB
• Operating Supply Voltage: - 0.3 V to + 1.26 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA
• I/o Voltage: 1.8 V
• Minimum Operating Temperature: 0 C
• Number Of Programmable I/os: 56
• Number Of Timers: 8

Overview
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MPC8306 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 2
For more information on QUICC Engine sub-modules, see QUICC Engine Block Reference
Manual with Protocol Interworking.
DDR SDRAM memory controller
— Programmable timing supporting DDR2 SDRAM
— Integrated SDRAM clock generation
— 16-bit data interface, up to 266-MHz data rate
— 14 address lines
— The following SDRAM configurations are supported:
— Support for up to 16 simultaneous open pages for DDR2
— One clock pair to support up to 4 DRAM devices
— Supports auto refresh
— On-the-fly power management using CKE
Enhanced local bus controller (eLBC)
— Multiplexed 26-bit address and 8-/16-bit data operating at up to 66 MHz
— Eight chip selects supporting eight external slaves
— Supports boot from parallel NOR Flash and parallel NAND Flash
— Supports programmable clock ratio dividers
— Up to eight-beat burst transfers
— 16- and 8-bit ports, separate LWE for each 8 bit
— Three protocol engines available on a per chip select basis:
— Variable memory block sizes for FCM, GPCM, and UPM mode
— Default boot ROM chip select with configurable bus width (8 or 16)
— Provides two Write Enable signals to allow single byte write access to external 16-bit eLBC
Integrated programmable interrupt controller (IPIC)
— Functional and programming compatibility with the MPC8260 interrupt controller
— Support for external and internal discrete interrupt sources
– Asynchronous HDLC (bit rate up to 2 Mbps)
– Two TDM interfaces supporting up to 128 QUICC multichannel controller channels, each
– Up to two physical banks (chip selects), 256-Mbyte per chip select for 16 bit data interface.
– 64-Mbit to 2-Gbit devices with x8/x16 data ports (no direct x4 support)
– One 16-bit device or two 8-bit devices on a 16-bit bus,
– Four chip selects dedicated
– Four chip selects offered as multiplexed option
– General-purpose chip select machine (GPCM)
– Three user programmable machines (UPMs)
– NAND Flash control machine (FCM)
slave devices
running at 64 kbps
Freescale Semiconductor