MPC8306VMAFDCA Freescale Semiconductor, MPC8306VMAFDCA Datasheet - Page 9

• Manufacturer Part Number: MPC8306VMAFDCA
• Description: Microprocessors - MPU E300 MP 333
• Manufacturer: Freescale Semiconductor

Specifications of MPC8306VMAFDCA

• Rohs: yes
• Processor Series: PowerQUICC II Pro
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 233 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB, 48 KB
• Interface Type: CAN, Ethernet, I2C, SPI, UART, USB
• Operating Supply Voltage: - 0.3 V to + 1.26 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA
• I/o Voltage: 1.8 V
• Minimum Operating Temperature: 0 C
• Number Of Programmable I/os: 56
• Number Of Timers: 8

2.1.3
The following table provides information on the characteristics of the output driver strengths.
2.1.4
The following table describes the input capacitance for the SYS_CLK_IN pin in the MPC8306.
2.2
The device does not require the core supply voltage (V
be applied in any particular order. Note that during power ramp-up, before the power supplies are stable
and if the I/O voltages are supplied before the core voltage, there might be a period of time that all input
and output pins are actively driven and cause contention and excessive current. In order to avoid actively
driving the I/O pins and to eliminate excessive current draw, apply the core voltage (V
voltage (GV
where the core voltage is applied first, the core voltage supply must rise to 90% of its nominal value before
the I/O supplies reach 0.7 V; see
stable, wait for a minimum of 32 clock cycles before negating PORESET.
Freescale Semiconductor
Input capacitance for all pins except SYS_CLK_IN and
QE_CLK_IN
Input capacitance for SYS_CLK_IN and QE_CLK_IN
Note:
1. The external clock generator should be able to drive 10 pF.
Local bus interface utilities signals
DDR2 signal
DUART, system control, I2C, SPI, JTAG
GPIO signals
MPC8306 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 2
Power Sequencing
Output Driver Characteristics
Input Capacitance Specification
DD
There is no specific power down sequence requirement for the device. I/O
voltage supplies (GV
with respect to one another.
and OV
Parameter/Condition
Driver Type
DD
) and assert PORESET before the power supplies fully ramp up. In the case
Figure
Table 4. Input Capacitance Specification
DD
Table 3. Output Drive Capability
3. Once both the power supplies (I/O voltage and core voltage) are
and OV
DD
NOTE
) do not have any ordering requirements
C
Symbol
DD
ICLK_IN
Output Impedance
C
) and I/O supply voltages (GV
I
()
42
18
42
42
Min
10
6
Max
—
8
Supply Voltage (V)
Electrical Characteristics
DD
DD
OV
GV
OV
OV
) before the I/O
Unit
DD
DD
DD
DD
pF
pF
and OV
= 3.3
= 1.8
= 3.3
= 3.3
DD
Note
—
1
) to
9